*****************************************************************************
*                                                                           *
*         IEEE Components, Packaging, and Manufacturing Technology          *
*                                                                           *
*         PACKAGING AND INTERCONNECTION ELECTRONIC NEWSLETTER               *
*                                                                           *
*                                                                           *
*                             Volume 1 (1)                                  *
*                             May 1, 1994                                   *
*                                                                           *
*                                                                           *
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The Packaging and Interconnections Electronic Newsletter has
been established as a vehicle for rapid and broad dissemination
of information in the general area of interconnections and 
packaging (both electrical and optical) for both electronic
and optical systems.  The newsletter is sponsored by the IEEE
Components, Packaging, and Manufacturing Technology Society
(IEEE CPMT).  The University Relations Committee of the MCM Division
of the Electronic Industries Assoication (EIA) is an affiliate of the
newsletter.

For informal information regarding subscriptions or submissions to
this newsletter, contact 
        Stuart K. Tewksbury
        Microelectronic Systems Research Center
        Dept. Electrical and Computer Engineering
        Eng. Science Bldg. 827
        West Virginia University
        Morgantown, WV 26506
        Tel: (304)293-6371  ext 512
        Fax: (304)293-7486
        Email: s.tewksbury@ieee.org

This initial issue provides some limited general information obtained from
a few submissions and collection on information from a few sources to
provide a basic model of the information which is sought.  All are 
encouraged to submit information to this newsletter.  Send submissions
to pkg_news@msrc.wvu.edu (see more detailed instructions at end)

*****************************************************************************
**************************  IEEE CPMT ENEWS  ********************************
*******************        Table of Contents        *************************
*****************************************************************************
*****************************************************************************
 
1: Educational Software and Videos

   1.1  "SCAN EDUCATOR" Boundary Scan Software Program
   1.2  "BETA-soft" Thermal Analysis Demo Software
   1.3  "PADS" PCB software (shareware version)
   1.4  "Silicon Run II" Educational Video Tape
   1.5  "MULTICHIP MODULES" Video of Panel Presentation

2: Calendar of Conference/Workshop/Seminars

3: Full Conference/Workshop/Journal Announcements

   3.1  1995 IEEE MCM CONFERENCE, Santa Cruz, CA, Jan 31 - Feb 2, 1995
   3.2  INTERPACK '95, Lahaina, Hawaii, March 26-30, 1995
   3.3  7th IEEE INTERNATIONAL CONFERENCE ON WAFER SCALE INTEGRATION
            San Francisco, California, USA, January 18-20, 1995
   3.4  ELECTRICAL MODELING,SIMULATION AND DESIGN OF ELECTRONIC PACKAGES
            San Jose, California, May 9-12, 1994
   3.5  1994 WSI CONFERENCE PROCEEDINGS FOR SALE
   3.6  A Special Section on Environmental Stress Testing (EST)
            IEEE Trans. on Components, Packkaging, & Manufacturing Technology
            CALL FOR PAPERS, Due date: June 15, 1994
   3.7  Fourth Intersociety Conf. Thermal Phenomena in 
            Electronic Systems - ITHERM 
            Washington, DC,  May 4-7, 1994 
   3.8  INTERNATIONAL CONFERENCE ON SOLDER FLUX AND PASTE 
            Atlanta, GA, JUNE 1-3, 1994
   3.9  16th Int. Electronics Manufacturing Technology Symposium 
            San Diego, CA,  Sept. 11-14, 1994 
   3.10  3rd Topical Meeting: Electrical Performance of Electronic Packaging 
            Monterey, CA,  Nov. 2-4, 1994 
            CALL FOR PAPERS:  Due Date June 20, 1994.
   3.11  2nd VLSI Packaging Workshop of Japan 
            Kyoto, Japan,  Nov. 30 - Dec 2, 1994
            CALL FOR PAPERS:  Due date June 30, 1994 
   3.12  1994 Government Microcircuit Applications Conference (GOMAC) 
            San Diego, CA, Nov. 7-10, 1994
   3.13  Leos'94: 7th Annual Meeting (IEEE Lasers and Electro-Optics Society) 
            Boston, MA  (Co-located with OPTCON '94), Oct. 31 - Nov 3, 1994
            CALL FOR PAPERS:  Due date June 3, 1994
   3.14  JOURNAL OF MICROELECTRONIC SYSTEM INTEGRATION 
           

4: Recent Articles in Trade Journals

   A)  "CPLD Module Packs 50K Usable Gates, 360 Pins." (April 4, 1994 EDN)
   B)  "Pick the Right Package for Your Next ASIC Design" (Feb 3, 1994 EDN)
   C)  "CAD tools for MCMs"  (Computer Design, March 1994)
   D)  "Chip-and-Wire Assembly for MCMs" (Feb 1994 EP&P)
   E)  "Processing Solutions for Thin Film MCMs" (Feb 1994, EP&P)
   F)  "MCM-L Approach Provides Cost-Effective Multichip Modules"
            (Solid State Technology, Apr. 1994)

5: Announcement:  University Relations Committee, EIA MCM Division

6: SUBSCRIPTION REQUESTS & SUBMISSION INFO




*****************************************************************************
**************************  IEEE CPMT ENEWS  ********************************
**************************     SECTION 1     ********************************
*************                                                  **************
*********            Educational Software and Videos           **************
*********                                                      **************
*****************************************************************************
*****************************************************************************
    

----------------------------------------------------------------------------
*ITEM 1.1  "SCAN EDUCATOR" Boundary Scan Software Program
          (Submitted by S. Tewksbury, skt@msrc.wvu.edu)   
----------------------------------------------------------------------------
The following is the description of the educational software provided
with the floppy disk.
  |   "An interactive program, Scan Educator presents a highly informative
  |  overview of the IEEE 1149.1 boundary scan standard.  Self-paced and
  |  menu driven, it examines the 1149.1 architecture, protocol, and 
  |  required instruction sets.
  |    Scan Educator contains animated simulations that guide you through
  |  the fundamentals of boundary-scan tests.  Hands-on exercises familiarize
  |  you with boundary-scan tests of the SCOPE (TM) oppctals available from
  |  Texas Instruments and introduces TIs ASSET (TM) scan-based diagnostic
  |  technology.
  |    You will also learn how to apply 1149.1 to single or multiple devices
  |  for in-circuit observability and controllability and for interconnect
  |  testing.
  |     Scan Educator runs on an IBM PC-AT or compatible using MS-DOS 3.3+
  |  and requires EGA or VGA, 5 MB of available disk space and 512K of
  |  available RAM.  Permission to copy software for educational purposes
  |  requires permission.  Unauthorized copying is prohibited."

For information regarding this educational software, call
       1-800-336-5236, ext. 3304
or write to 
       Texas Instruments
       Literature Response Center
       P.O. Box 172228
       Denver, CO 80217


--------------------------------------------------------------------------
*ITEM 1.2  "BETA-soft" Thermal Analysis Demo Software
          (Submitted by S. Tewksbury, skt@msrc.wvu.edu)   
--------------------------------------------------------------------------

"BETA-soft" Thermal Analysis for the Board, System & Component
Dynamic Soft Analysis, Inc. provides a demonstration version of their
thermal analysis softare for electronic components and packaging.
The demo runs on IBM XT/AT, PS@, or compatibles using DOS.  EGA or
VGA monitor and a mouse are required.  Math coprocessor not required.

The following information is provided in the demo's manual.
    |  "The demo contains five programs.
    |     BETAsoft-C for the thermal analysis of components.
    |     BETAsoft-R for the thermal and reliability analysis of
    |         electronic boards.
    |     BETAsoft-S for the thermal analysis of cardcages and cabinets.
    |     BETAsoft-M for the management of data-transfer between
    |         BETAsoft-R, -S, and -C.  The demo is automatically loaded
    |         with any selection from the three above.
    |     
    |  These programs are identical to the BETAsoft product except that:
    |  1.  The demos do not contain the major computational analysis
    |      computational analysis programs; however, they do provide a
    |      total demonstration of the input and output with examples.
    |  2.  A small sample component library has been included with
    |      BETAsoft-R.
    |  3.  The CAD Integrator demo is limited to transferring 20 components."

 For information on the demo software (and the full software), contact
     Dynamic Soft Analysis, Inc.
     5655 Forbes Avenue
     Pittsbufh, PA 15217
     Tel: (412)683-0161
     Fax: (412)683-3641
    
------------------------------------------------------------------------------
*ITEM 1.3  "PADS" PCB software (shareware version)
        (Submitted by S. Tewksbury, skt@msrc.wvu.edu)   
------------------------------------------------------------------------------

 "PADS-PCB" and PADS-Logic" Evaluation packages provide capabilities to
 complete layout and routing of simple printed circuit boards.  We have
 found the shareware versions to be particularly useful for students
 beginning their training in the use of CAD packages.  Although the full
 full capabilities of the PADS software do not appear in this shareware
 version, it is quite capable.

 Information and other inquiries should be directed to
     PADS Software Inc.
     Marlborough, MA
     Tel:  (508)485-4300


------------------------------------------------------------------------------
*ITEM 1.4  "Silicon Run II" Educational Video Tape
          (Submitted by S. Tewksbury, skt@msrc.wvu.edu)   
------------------------------------------------------------------------------

 "SILICON RUN" was the first educational video developed by Ruth Carranza and
 covered the topics involved in the manufacture of integrated circuits.  The
 second video was made available in 1993 and is entitled SILICON RUN II.  It
 continues past the VLSI fabrication of the first video and includes the 
 "manufacturing processes by which IC wafers are made into the chips used in
 microcomputers and the multichip units of high-end computers".  The
 film provides a strong view of the role of automation in the transition
 from the untested wafer to the packaged component which strongly impressed
 my students. Running time is 35 minutes.

 The video was developed by Ruth Carranza Productions in collaboration with 
 the Center for Integrated Systems of Stanford University and with funding from
    a)  the National Science Foundation,
    b)  Intel Corporation,
    c)  Apple Computer,
    d)  Digital Equipment Corp.
    e)  SEMI, Inc.,
    f)  Dept. of Electrical Engineering, Stanford University.

 To order, or for more information, call or write
     SILICON RUN
     Ruth Carranza Productions
     P.O. Box 391025
     Mountain View, CA 94039
     Tel:   (408) 971-7346
     Fax:   (408)962-8539  


------------------------------------------------------------------------------
*ITEM 1.5  "MULTICHIP MODULES" Video of Panel Presentation
          (Submitted by S. Tewksbury, skt@msrc.wvu.edu)   
------------------------------------------------------------------------------


 "MULTICHIP MODULES" is a video tape of a discussion of multichip modules 
 by Mentor Graphics, Motorola, and MicroModule Systems.  It was announced
 on a "first-come, first-served" basis in trade journals.  For those seeking
 a broad discussion of the topic, along with well developed and presented
 vugraphs/slides, the video is highly recommended.  MCM-L, MCM-C, and MCM-D
 are included, with discussions of advantages and disadvantages and images
 of several examples.  Running time is 2 hours.

 Inquiries regarding availability should be to
     Computer Channel, Inc.
     6801 Jericho Turnpike
     Syosett, NY 11791
     Tel:  (516)921-5170



*****************************************************************************
**************************  IEEE CPMT ENEWS  ********************************
**************************     SECTION 2     ********************************
*************                                                  **************
*********       Conference/Workshop/Seminar Announcements      **************
*********                                                      **************
*****************************************************************************
*****************************************************************************


May 9-12:      Short Course: Electrical Modeling, Simulation, and Design of
               of Electronic packaging.
    Location:  Radisson Hotel, San Jose, CA
    Contact:   Raj Mittra, Electromagnetic Compatibility Lab, ECE Dept.
               University of Illinois
               Tel:  (217)333-1202  Fax: (217)333-8986
               E-mail: rmittra@decwa.ece.uiuc.edu

June 8 - 10:  15th International SAMPE European Conf. and Exhibition.
    Location:  Toulouse, France
    Contact:   Nanci Hawley, SAMPE, PO Box 2459, Covina, CA 91722
               Tel:  (818)331-0616  Fax: (818)332-8929

July 20 - 22:  Modern Electronic Packaging Seminar.
    Location:  Boston, MA
    Contact:   Technology Seminars, Inc.  PO Box 487,
               Lutherville, MD 21093
               Tel:  (410)252-3425

Aug. 30 - Sept.1:  Surface Mount International.
    Location:  San Jose, CA
    Contact:   Miller Freeman Inc., 13760 Noel Rd.
               Suite 500, Dallas, TX 75240
               Tel:  (800)223-7126

Sept. 12:  Surface-Mount Technology Course.
    Location:  Laurel, MD
    Contact:   Jane Gazaway, PACE Inc., 9893 Brewers Ct
               Laurel, MD 20723
               Tel:  (301)490-9860
    


*****************************************************************************
**************************  IEEE CPMT ENEWS  ********************************
**************************     SECTION 3     ********************************
*************                                                  **************
*********   Full Conference/Workshop/Journal Announcements     **************
*********                                                      **************
*****************************************************************************
*****************************************************************************



----------------------------------------------------------------------------
*ITEM 3.1  1995 IEEE MCM CONFERENCE
           The Cocoanut Grove, Santa Cruz, CA, Jan 31 - Feb 2, 1995

           FIRST CALL FOR PAPERS
              Tutorials:  JANUARY 31, 1995
              Conference: FEBRUARY 1 & 2, 1995  
          (Submitted by Bob Frye  rcf@clockwise.mh.att.com)
----------------------------------------------------------------------------


Sponsored by the IEEE Circuits and Systems Society, Computer Society,
Components, Packaging and Manufacturing Technology Society, and 
Electron Devices Society.


                                                 
            CONFERENCE HIGHLIGHTS             

TUTORIALS: in-depth presentation covering relevant MCM related topics.

TECHNICAL SESSIONS: agenda designed to foster interaction among chip 
designers, system designers, CAD tool developers, and MCM technologists.

INVITED TALKS: address the latest developments and future trends.

PANEL DISCUSSIONS: interactive discussions of immediate needs, problem 
areas, concerns and innovative solutions.

EXHIBITS: MCM foundry, known-good die technology, MCM design tools, 
simulation and layout benchmark posters.


	___________________________________________________

       TECHNICAL PAPERS ARE SOLICITED ON, BUT NOT LIMITED TO: 


DESIGN FOR MCM: system and chip design specifically targeted for MCM
technology -- custom I/O buffers, packaging-driven partition, design for
test, design for manufacturability, design for cost.

MCM TECHNOLOGY FOR LOW POWER SYSTEMS: minimum capacitance design, portable
electronics, integral passive and active components, high-frequency and 
optical interfaces.

ANALYSIS: modeling and simulation of electrical and thermal behavior of MCM
structures, noise analysis, delay analysis, performance and cost driven 
design. 

APPLICATIONS: innovative uses of MCM technology, system-level optimization.

TECHNOLOGY: novel MCM structures and fabrication methods.

TESTING: methodology, design and technology for MCM test, known-good die, 
die- and wafer-level burn-in, boundary scan and built-in self-test for MCMs.

INFRASTRUCTURE: standards, MCM foundry, university and small company access
to MCM technology.

	___________________________________________________

               SUBMISSION DEADLINE: AUGUST 12, 1994 

Authors should submit an extended abstract (not exceeding 2000 words, plus 
figures). The extended abstract should contain sufficient details to permit 
a careful review for technical excellence.  Authors should clearly state 
their contribution and point out new and significant results. Submissions 
may be made by mail, fax, or e-mail.

All appropriate company and government clearances must be obtained prior
to submission.

Please send abstract and summary to:

	David B. Tuckerman
	nCHIP, Inc.
	1971 North Capitol Ave.
	San Jose, CA 95132
	Tel:  408-945-9992 ext. 237
	Fax:  408-945-0151
	davidt@nchip.com


For tutorial suggestions and information:

	Paul Franzon
	Department of Electrical and Computer Engineering
	Box 7911
	North Carolina State University, Raleigh NC 27695-7911
	Tel:  919-515-7351
	Fax:  919-515-5523
	paulf@ncsu.edu


For information on exhibits:

 Wayne Wei-Ming Dai 
	Computer Engineering
	University of California, Santa Cruz
	Santa Cruz, CA 95064
	Tel:  408-459-4234
	Fax:  408-459-4829
	dai@ce.ucsc.edu


For advance program and other information:

	Lisa Pascal
	Computer Engineering, University of California
	Santa Cruz, CA 95064
	Tel:  408-459-2263
	Fax:  408-459-4829
	lisa@cse.ucsc.edu


Notice of acceptance will be mailed by September 20, 1994. Authors of accepted 
papers will be expected to provide a camera-ready manuscript of up to 6 pages
on IEEE supplied model paper by November 15, 1994, for publication in the 
conference proceedings.

	___________________________________________________

STEERING COMMITTEE:

Chair:  Robert C. Frye, AT&T Bell Laboratories
Technical Program:  David B. Tuckerman, nCHIP, Inc.
Finance and Local Arrangements:  Rui Wang, Cadence Design Systems
Tutorials:  Paul Franzon, North Carolina State University
Exhibits:  Wayne Wei-Ming Dai, University of California, Santa Cruz
Past Chair:  David P. LaPotin, IBM T. J. Watson Research Center
Asia Liason:  Yuji Okuto, NEC Corp.
Europe Liason:  Bernard Coutois TIMA - CMP

Sung Mo (Steve) Kang, University of Illinois
James D. Murphy, Advanced Research Projects Agency
David W. Palmer, Sandia National Laboratories
King L. Tai, AT&T Bell Laboratories
Jan Vardaman, Techsearch International
Simon Wong, Stanford University



----------------------------------------------------------------------------
*ITEM 3.2  INTERPACK '95, Lahaina, Hawaii, March 26-30, 1995
           CALL FOR PAPERS
          (Submitted by L. Fox, l.fox@ieee.org)   
----------------------------------------------------------------------------

InterPack '95
International Intersociety Electronic Packaging Conference
Westin Maui, Lahaina, Hawaii.  March 26-30, 1995

                        CALL for PAPERS

SPONSOR:
The American Society of Mechanical Engineers (ASME)

COOPERATING SOCIETIES:
The Japan Society of Mechanical Engineers (JSME)
The Institute of Electrical and Electronics Engineers (IEEE)
International Electronic Packaging Society (IEPS)


InterPack '95 will provide a premier international forum for the
presentation and dissemination of knowledge in electronic packaging.

Planned sessions address:
Packaging Applications - including Workstation Computers, Automotive
           Electronics, Telecommunication Equipment, and Mechatronics;
Packaging Science - including Structural Analysis, Thermal Management,
           Optoelectronics, Material Characterization, Tribology, and
           Physics-of-Failure;
Packaging Design, including Methodology, Manufacture/Assembly,
           Computational Methods, and 3-D Packaging; and
Packaging Education.

Technical papers addressing these or related aspects of engineering
science and practice in electrical and electronic packaging are
solicited.  Papers dealing with original research, innovative design,
or analysis of technology trends and options are appropriate for this
conference.

Authors wishing to present a paper, a panel presentation, or a
tutorial on these or closely related topics should submit a 500
word Abstract, by mail, FAX, or E-mail to:

                      Prof. Avram Bar-Cohen
                     Chairman, InterPack '95
 Department of Mechanical Engineering, University of Minnesota
           111 Church St. S.E., Minneapolis, MN 55455
  Tel: 612-626-7244; Fax: 612-624-1398; E-mail: abc@me.umn.edu
                                or

                        Prof. Tai Ran Hsu
                 Program Chirman, InterPack '95
  Mechanical Engineering Department, San Jose State University
          One Washington Square, San Jose, CA 95192087
          Tel: 408-924-3905; Fax: 408-924-3995; E-Mail:

                Abstract Due Date: 15 May 1994
                Complete Paper Due: 15 July 1994
          Revised Accepted Papers Due: 15 October 1994

OUTLINES OF SPECIFIC SESSIONS/TRACKS:

TOPICAL AREA 1:
Material Characterization and Experimental Mechanics in Packaging

Scope:
o Mechanical Properties: Thermo-mechanical properties of materials
     used in electronic packaging, such as plated copper, aluminum,
     solders, composites, dielectrics, thin films, and encapsulants.
     Topics include, but are not limited to, temperature dependent
     stress-strain behavior, fatigue, creep, and relaxation.

o Characterization of Interfaces: Metal-metal, metal-dielectrics,
     metal-polymers. Topics include measurement of and measurement
     techniques for adhesion, delamination, interfacial crack
     propagation, toughness of materials, and fracture and
     deformation.

o In-situ Measurements: Novel methods used in understanding mechanical
     origins of failure of packages during manufacture, assembly and
     tests.  They may be photo-elastic, holographic, and Moire
     interferometric measurements, mini-line methods in product
     development, nanoindentation, experimental verification of
     analytical and numerical results, including correlation between
     the two.

Abstract/Paper Submission Deadlines:
Abstracts Due                              April 29, 1994
Acceptance of Abstracts                    May  21, 1994
Full Papers Due                            July  15, 1994
Revised Accepted Papers Due                Oct  15, 1994

Please submit three copies of 500 word abstract to:

Dr. K. Ramakrishna                          Dr. Bahgat G. Sammakia
Advanced Packaging Development Center       E22G/257-4E, P.O. 8000
Motorola, Incorporated, MD EL615            IBM Corporation
2100 East Elliot Road                       1701 North Street
Tempe, AZ 85284.                            Endicott, NY 13760-8000
Phone: (602) 897-5691                       Phone: (607) 757-1072
FAX:   (602) 897-4511                           FAX:   (607) 757-1274
email:rp2045@email.sps.mot.com    email:sammakia@endvmtkl.vnet.ibm.com

Prof. R. J. Pryputniewicz
Department of Mechanical Engineering - CHSLT
Worcester Polytechnic Institute
100 Institute Road, Worcester, MA 01609-2280.
Phone: (508) 831-5536, FAX: (508) 831-5713
email: rjp@wpi.wpi.edu


TOPICAL AREA 2:
Transport Processes During Manufacture and Assembly of Electronic
      Packages

Scope:
Heat, mass and momentum transport issues encountered during
manufacture and assembly processes at all levels of packaging - from
chip to module to system level. Topics may include, but are not
limited to, drilling, lamination, plating, soldering and reflow
processes, molding of packages, encapsulation, TAB processes, repair,
laser processes, lithography, vacuum deposition processes,
thermo-fluids aspects in disk drives, experimental methods, in-situ
measurement and control of transport variables, thermo-fluids
characterization of ovens, furnaces and equipment used the processes,
rheology, and all topics which have the theme of transport phenomena
and manufacturing processes. Contributions will encompass
experimental, analytical and numerical investigations.

Abstract/Paper Submission Deadlines:
Abstracts Due                              April 29, 1994
Acceptance of Abstracts                    May  21, 1994
Full Papers Due                            July  15, 1994
Revised Accepted Papers Due                Oct  15, 1994

 Please submit three copies of 500 word abstract to:

Dr. K. Ramakrishna                        Prof. Yogendra K. Joshi
Advanced Packaging Development Center     Dept of Mechanical Engineering
Motorola, Inc., MD EL615                  University of Maryland
2100 East Elliot Road                     College Park, MD 20742.
Tempe, AZ 85284.                          Phone: (301) 405-5428
Phone: (602) 897-5691                     FAX:   (301) 314-9477
FAX:   (602) 897-4511                     email: yogi@eng.umd.edu
email: rp2045@email.sps.mot.com

Dr. Bahgat G. Sammakia
E22G/257-4E, P.O. 8000
IBM Corporation
1701 North Street
Endicott, NY 13760-8000
Phone: (607) 757-1072
FAX:   (607) 757-1274
email: sammakia@endvmtkl.vnet.ibm.com

ORGANIZERS:
Avram Bar-Cohen, University of Minnesota - Conference Chairman
Wataru Nakayama, Tokyo Institute of Technology - Conference Co-Chairman
Tai Ran Hsu, San Jose State University, Program Chairman

INTERPACK '95 ORGANIZING COMMITTEE
                        H.  Abe                 L. Moresco
                        W. Aung                 Y. Pao
                        W. Chen                 M. Pecht
                        P. Engel                R. Pryputniewicz
                        R. Fulton               B. Sammakia
                        J. Goodling             M. Shiratori
                        K. Ikegama              E. Suhir
                        R. Jaegar               I. Turlik
                        M. Mahalingam           S. Witzman


----------------------------------------------------------------------------
*ITEM 3.3  Seventh IEEE International Conference on Wafer-Scale Integration
           San Francisco, California, USA, January 18-20, 1995
           CALL FOR PAPERS
          (Submitted by S. Tewksbury, s.tewksbury@ieee.org)   
----------------------------------------------------------------------------

                     CALL FOR PAPERS
      Seventh Annual IEEE International Conference on
               Wafer-Scale Integration


     The Conference on Large Area Devices, System on a Substrate,
                      and Complex MCMs

                       January 18-20
                       Fairmont Hotel
                 San Francisco, California, USA

SPONSORED BY
     The IEEE Computer Society and 
     The IEEE Components, Packaging, and Manufacturing Technology Society

General Chair:  S.K. Tewksbury, West Virginia University
Program Chair:  Glenn Chapman, Simon Fraser University

GENERAL DESCRIPTION OF INTERESTS
   The IEEE Wafer-Scale Integration Conference is the premier forum for
   reporting on new WSI applications, architectures, progress in WSI design,
   fabrication and packaging technologies.  Papers relating to both monolithic
   WSI and hybrid WSI (Multichip Modules: MCMs) are sought with equal priority.
   Preference will be given to reportage of practical contributions to this
   rapidly expanding field.  Also addressed are applications of technologies
   related to WSI such as large area ICs, active substrate MSMs, IC repair,
   defect/fault tolerance, high reliability systems, and optical
   interconnections.  The conference will feature demonstrations of WSI devices,
   processes, CAD tools and software.


   Submissions are invited on topics including, but not limited to, the
   following:

   A) WSI IMPLEMENTATIONS
        WSI Technologies
        Large Area ICs
        DeviceSystem Implementations
        Component Reliability
        I/O Techniques and Performance
        Analog & Mixed Technologies
        Rework and Self Repair
        WSI Packaging

   B)  DESIGNS
        WSI Architectures
        Neural Networks
        Thermal Analysis
        Yield Analysis
        Defect & Fault Tolerance
        Reconfiguration
        Microelectromechanical Arrays
        Optical Interconnections

   C)  APPLICATIONS, MODELING, AND THEORY
        Advanced WSI Applications
        Dense Protable Electronics
        Medical Electronics
        CAD/CAE Design Tools
        Yield Modelling
        Cost Modeling
        Power Modeling
        Testing and Testability

SUBMISSION OF PAPERS
   Authors should submit six copies of summaries (3 to 4 pages,
   plus figures) of their paper to the Program chair.  In addition
   to regular and keynote papers, an evening panel discussion will
   be held on key WSI issues.  Regular and keynote papers will be
   published in hardcover proceedings that will be available at
   the conference.  Submissions for keynote papers and panel topics
   should be sent to the Program Chair before June 1st.

IMPORTANT DATES
   June 1, 1994:      Summary submission deadline
   August 15, 1994:   Paper acceptance notification
   October 15, 1994:  Final manuscripts due

Program Chair:  Prof. Glenn Chapman
                School of Engineering Science
                Simon Fraser University
                Burnaby, BC V5A 1S6, CANADA.
                Tel:  +1 (604)291-3814
                Fax:  +1 (604)291-4951
                e-mail:  glennc@cs.sfu.ca

European Chair: Prof. R. Mike Lea
                Brunel University
                Uxbridge, Middlesex UB8 3PH
                UNITED KINGDOM
                Tel:  +44 895 203221
                Fax:  +44 895 258728
                email:  Mike.Lea@brunel.ac.uk

Asian Chair:    Prof. Susumu Horiguchi
                Dept. of Information Systems
                JAIST, Horuriku
                Tatsunokuchi, Ishikawa
                933-12 JAPAN
                Tel:  +81 761 51 1265
                Fax:  +81 761 51 1135
                email:  hori@jaist.ac.jp

General Chair:  Prof. Stuart Tewksbury
                Dept. of Electrical and Computer Engineering
                Engineering Science Building 827
                West Virginia University
                Morgantown, WV 26506   USA
                Tel:  +1 304 293 6371  ext 512
                Fax:  +1 304 293 7486
                email: skt@msrc.wvu.edu

Feel free to contact any of the above individuals regarding any questions
regarding suitable topics or any other information regarding the conference.



----------------------------------------------------------------------------
*ITEM 3.4  ELECTRICAL MODELING,SIMULATION AND DESIGN OF ELECTRONIC PACKAGES
           San Jose, California, May 9-12, 1994
           SHORT COURSE
----------------------------------------------------------------------------

       The University of Illinois at Urbana-Champaign announces
   ELECTRICAL MODELING,SIMULATION AND DESIGN OF ELECTRONIC PACKAGES

                An Intensive Four-Day Short Course

          With Raj Mittra, Paul Franzon and Jose Schutt-Aine

                       May 9-12, 1994
                   San Jose, California

Attention:  This four day short course is designed for engineers,
            physicists, and mathematicians engaged in the design,
            development, and testing of electronic packages for 
            computers and communication systems.

Co-Sponsors:  
     The Office of Continuing Engineering Education,
     The College of Engineering, University of Illinois 
          at Urbana-Champaign, and
     The Department of Electrical and Computer Engineering, 
          North Carolina State University.

COURSE DESCRIPTION

    This four day short course will provide an in-depth coverage of numerous
aspects of electrical modeling, simulation and design of electronic packages.

    Various design options will be discussed and the electrical issues
in package design will be identified.  Detailed design procedures
will be outlined and the use of CAD/CAE tools for package layout
will be described.

    Techniques for electromagnetic modeling and simulation of interconnects,
multiconductor transmission lines, discontinuities in these lines,
e.g., bends, tapers and vias, will be presented.

    Methods for estimating the power and ground plane noise and spurious
radiation from the package will also be discussed.


LECTURERS

Paul Franzon is currently an associate professor in the Department
     of Electrical and Computer Engineering at North Carolina State University.
     He has over eight years experience in electronic systems design
     and design methodology research and development including working
     at AT&T Bell Laboratories and as the founding member of a communications
     company.  Dr. Franzon's current research interests focus on the
     design sciences/methodology for high speed packaging and interconnect,
     and also for high speed and low power chip design.  He is a consultant
     to a number of companies in these areas and has extensive experience
     in teaching related professional courses.

Raj Mittra is professor of Electrical Engineering at the University
     of Illinois at Urbana-Champaign and Director of the Electromagnetic
     Communication Laboratory. He has directed many short courses on
     Computational Electromagnetics, both in the U.S. and in Europe and
     has offered on-site seminar series at several industrial locations
     including GTE Network Systems, Cray Research, DEC, IBM and Intel.
     He has authored and co-authored over three hundred-fifty research
     papers and twenty textbooks. He has served the IEEE AP-S Society
     as a National Distinguished Lecturer, as President and as an Editor
     of the IEEE Transactions on Antennas and Propagation. He also heads
     RM Associates, a company that provides consulting services to many
     government and industrial organizations.

Jose E. Schutt-Aine is an assistant professor of Electrical and Computer
     Engineering at the University of Illinois.  He received his B. S.
     degree from MIT in 1981, and his M.S. and Ph.D degrees from the
     University of Illinois in 1984 and 1988, respectively.  He has worked
     as a device engineer at the Hewlett-Packard Microwave Technology
     Center in Santa Rosa, California.  He has also held summer positions
     at GTE Network Systems in Northlake, Illinois.  Dr. Schutt-Aine's
     interests include microwave theory and measurements, electromagnetics,
     high-speed digital circuits, solid-state electronics, circuit design
     and electronic packaging.


COURSE OUTLINE

l.	Overview of package alternatives
	  a.	Interconnections vs. Connections
	  b.	Single chip packages
	  c.	PCBs
	  d.	Multichip package circuit bases
	  e.	Bare chip connections
	  f.	MCM-PCB and PCB-PCB Connectors

2.	Review of digital circuits, DC and AC properties
	  a.	Definitions of relevant DC and AC properties
	  b.	Process variations
	  c.	Typical properties by circuit family; circuit model alternatives

3.	Review of synchronous design
	  a.	Advantages of synchronous design
	  b.	Signal integrity
	  c.	Asynchronous design (in particular clock lines)

4.	Electrical Phenomena in Packaging
	  a.	When to use transmission line treatment
	  b.	Reflection noise causes; Lattice diagram modeling; and control
 	    through net topology control and matching
	  c.	Lines losses
	  d.	Controlling reflection noise and line losses for first incident
	     switching
	  e.	Coupling; Crosstalk noise equations for TLs and lumped circuits;
	     deciding line spacing; deciding on lead requirements
	  f.	Simultaneous Switching Noise; Modeling; Control alternatives
	  g.	Common Impedance Noise
	  h.	EMI and EMC; Rules of thumb for control

5.	System design of packaging (Decision Making)
	  a.	Basic technology mix to optimize electrical performance
	  b.	Interconnection cross- section (`stackup')
	  c.	Connections (single chip package, bare chip, connector)
	  d.	SSN control approach
	  e.	Noise budget
	  f.	Floorplan

6.	Detailed design of packaging (Decision Making)
	  a.	Net topology selection
	  b.	Driver and other active circuit selection to optimize timing
	     design
	  c.	Termination selection
	  d.	Use of CAE/CAD tools in turning a logic/timing design into a
	     layout (placement and routing) that meets timing and signal
             integrity requirements

7.	Identification of Electrical issues in Electronic Packages from
	  Modeling Point of View (Signal Integrity, Delay, Clock Skew, Crosstalk
	  Noise, Power Plane Noise, Spurious Radiation)

8.	Review of Fundamentals of Electrostatics, Magnetostatics and
        Electromagnetics
	  a.	Electric field; Electrostatic Potential; Gauss's Law; Laplace's
	     and Poisson's Equations; Green's Function; Capacitance;
             Multi-capacitance Systems; Dielectric Material;
             Quasistatic Approximation
	  b.	Biot-Savart Law; Ampere's law; Inductance
	  c.	Maxwell's Equations; Constitutive Relations; Polarization; Radi
	     ation Integral; Mutual Coupling; EM Interference and EM
             Compatibility

9.	Package Modeling Techniques
	  a.	Method of Moments and the Boundary element Method; Application
	     to Capacitance and Inductance Calculations for single and multiple
	     lines; Three-dimensional inductance and capacitance calculations;
	     Relation to PEEC approach; Examples
	  b.	Introduction to Finite Element Method (FEM); Application to
             capacitance
  	     and inductance calculations for uniform and multiple lines with
	     etches of arbitrary cross-section; Extension to three-dimensional
	     calculations of complex geometries; Examples
	  c.	Introduction to Finite Difference Time Domain (FDTD) algorithm;
	     Modeling of arbitrary structures including transmission lines,
	     discontinuities, e.g., bends, vias and backplane connectors;
             Examples
	  d.	Extraction of equivalent circuits of discontinuities for
             insertion into SPICE and SPICE-type circuit simulation algorithms
	  e.	Comparison between various modeling approaches and
             recommendations as to when to use what
	  f.	Brief descriptions of available computer codes

10.	Power Plane Noise Modeling
	  a.	Electrical Modeling of single and multilayer Power Planes
	  b.	Computation of Leff and equivalent capacitance of power planes
	  c.	Application to the estimation of delta-I noise

11.	Spurious Radiation from Packages
	  a.	Techniques for calculating the current distribution on
             conducting etches on PC boards
	  b.	Computation of spurious radiation from these currents
	  c.  Design recommendations

12.	Transmission Line Analysis
	  a.	Transmission-Line Equations
	  b.	Time and Frequency-Domain Solutions

13.	Coupled Line Analysis
	  a.	Telegraphers Equations for Coupled Lines
	  b.	Even and Odd Mode Analysis
	  c.	Solution and Coupling of Modes

14.	N-Line Analysis
	  a.	Matrix Telegrapher's Equations
	  b.	Eigen Analysis
	  c.	Modal Solutions & Examples

15.	Device Modeling
	  a.	Motivation
	  b.	Numerical Integration Methods
	  c.	Newton-Raphson Iteration Method

16.	Scattering Parameters and Nonlinear Analysis
	  a.	Motivation and Advantages of Scattering Parameters
	  b.	Definition of Scattering Parameters
	  c.	Formulation & Solution
	  d.	Matrix Generalization
	  e.	Simulation Examples

17.	Nonuniform Transmission Lines
	  a.	Recursive Methods for Tapered Transmission Lines
	  b.	Recursive Methods for Transmission Lines with Discontinuities
	  c.	Simulation Examples

18.	Experimental Characterization of Transmission Lines
	  a.	Time-Domain Reflectometry
	  b.	Characterization of Single and Coupled Lines
	  c.	Frequency Domain Characterization
	  d.	Measurement of Loss and Dispersion Parameters	  
	  e.	Examples from Microstrip and Stripline Measurements



GENERAL INFORMATION

* To register:  Early registration is advised. Complete and return the
	     Registration Form or phone the registrar,  Kendra Reasor, at 
	     217-244-2037; FAX 217-333-0015 or e-mail: reasor@ux1.cso.uiuc.edu.

* For technical information phone 
	     Raj Mittra at 217-333-1202 or FAX 217-333-8986 or 
	  	      e-mail: rmittra@decwa.ece.uiuc.edu; 
	     Paul Franzon at 919-515-7351 or 
	  	      e-mail: paulf@eos.ncsu.edu; 
	    Jose E. Schutt-Aine at 217-244-7279 or 
	  	      e-mail:  jose@decwa.ece.uiuc.edu.  

* Attendance is limited. Register early to guarantee your course materials.

* The registration fee is $1,050.00 for the course. This fee includes all 
	 course materials and refreshment breaks.

* Schedule:  

  Registration and check-in:  8:30 - 9:00 a.m. on the first day.  
  The seminar hours will be 9:00 - 12 noon and 1:30 p.m. - 4:30 p.m. each day.

* Location:  The course is being held at 
       The Radisson Hotel
	      1471 North  Fourth Street 
	      San Jose, CA  95112  
	      (408)-452-0200.

* Lodging:  If you need overnight accommodations, contact 
	     The Radisson Hotel 
	     1471 North Fourth Street
	     San Jose, CA 95112
	     (408) 452-0200
	  Be sure to mention that you are attending the "Electrical Modeling,
	  Simulation and Design of Electronic Packages" course to receive
	  the special conference rate of $71.00 per night for a single or
 	 double room.  Reserve your room before April 24, 1994 to be guaranteed
	  the special conference rate.

*  Continuing Education Units: This program will be assigned 2.4 Continuing
	  Education Units (CEU's). A certificate of course completion will
	  be awarded.

*  Substitutions and Refunds:  Substitutions may be made at any time.
	  If for any reason whatsoever you cannot attend, the entire tuition
	  fee, minus $25.00 administration fee, will be refunded if cancellation
	  is received before start date of the course. Please register early.

*  In-House Program:  This program is also available for on-site presentations.
	  If you are interested in a tailor-made program to be offered at
	  your company site, call Lynnea Johnson at 217-333-3836 for further
	  information.

        THE UNIVERSITY OF ILLINOIS AT URBANA-CHAMPAIGN
 ELECTRICAL MODELING, SIMULATION AND DESIGN OF ELECTRONIC PACKAGES
                          May 9-12

***FOUR EASY WAYS TO REGISTER	REGISTRATION FORM****

In each case, provide the following personal information
	  	  Last Name,	First Name, Middle Initial
		    Full Address
		    (Area Code) + Home Phone 
		    (Area Code) + Business Phone
	 	   Fax number

1.	Call 217-244-2037.
	  Ask for Kendra Reasor,	who will be glad to register you.	

2.	Mail:
	  University of Illinois at Urbana-Champaign	Institution	       
	  Short Course: Electrical Modeling, Simulation & Design of Electronic
                        Packages	  
	  Office of Continuing Engineering Education
	  422 Engineering Hall
	  1308 West Green Street	Address
	  Urbana, IL  61801
			
3.	Fax Conference at:  217-333-0015

4.	e-mail:  reasor@ux1.cso.uiuc.edu

  ___________________________________________________________________________
  |                                                                          |
  |  Registration Fee	($1,050.00 per person).	                               |
  |  Method of Payment                                                       |
  |                                                                          |
  |  	  _____	Purchase order enclosed.  F.E.I.N. # must be included          |
  |  	  	     for purchase order.                                            |
  |                                                                          |
  |  	  _____	Charge my fee to:  _____ Visa _____ MasterCard                 |
  |  	  	  	  	  Card no. ________________________                           |
  |  	  	  	  	  Expiration date ________________                            |
  |                                                                          |
  |  _____	Check enclosed (made payable to the University of Illinois)       |
  |                                                                          |
  |  _____	Please bill me at my organization address.                        |
  |  	  	  F.E.I.N. # must be included for billing.                          |
  |  	  	  F.E.I.N. # _________________________		                            |
  |  	  	  Your signature _____________________________                      |
  |                                                                          |
  |__________________________________________________________________________|


   Another professional development course from the University of Illinois
   at Urbana-Champaign.

  "Electromagnetic Computation on Parallel and Distributed Architectures"
                          July 11-14, 1994
                        Champaign, Illinois

         Call Lynnea Johnson at 217-333-3836 for more information.



----------------------------------------------------------------------------
*ITEM 3.5  1994 WSI CONFERENCE PROCEEDINGS FOR SALE
           (Submitted by Paul Wesling, WESLING_PAUL@Tandem.COM)   
----------------------------------------------------------------------------

1994 WSI CONFERENCE PROCEEDINGS FOR SALE
 The IEEE Int'l Conference on Wafer-Scale Integration, held in January,
covered both hybrid wafer-scale (also known as Multi-Chip Modules) and
conventional WSI.  Sponsored by two of the IEEE's Societies, it
consisted of 37 papers in the following sessions:
  -- Applications       (A & B -- 9 papers)
  -- Yield Assessment   (5 papers)
  -- Reconfiguration    (A & B -- 9 papers)
  -- Testability        (5 papers)
  -- Physical Issues    (A & B -- 8 papers)
  -- Keynote: WSI Evolution

  There were about 100 copies of the softcover Proceedings, in a convenient
6"x9" textbook size, left over after the Conference; they are available
at $35 each (about $1 per paper!), and the price includes surface
shipment worldwide (add $10 for international air shipment).  To
order, send a check, made out to "IEEE WSI Conference", to:
   Paul Wesling              p.wesling@ieee.org
   12250 Saraglen Drive
   Saratoga, CA  95070  USA

  For a copy of the Call for Papers for the 1995 WSI Conference, send
an email request to Program Chair Prof. Glenn Chapman at
glennc@cs.sfu.ca

Also covered in the Proceedings: 3D-WASP program; Pixel/image
processing appplications; CAD tool for MCM package design; local
sparing, reconfiguration, and redundancy; integrated testability,
diagnosis, and DFT issues; clock-sync and communication speed; FERMI
projects for high-energy physics; New applications: ATM, magnetic
sensors, DSP.


-----------------------------------------------------------------------------
*ITEM 3.6  A Special Section on Environmental Stress Testing (EST)
           IEEE TRANS. ON COMPONENTS, PACKAGING, & MANUFACTURING TECHNOLOGY
           Due date: June 15, 1994
           CALL FOR PAPERS
           (Submitted by Paul Englert, pe@whserva.att.com)   
-----------------------------------------------------------------------------


                        CALL FOR PAPERS
        A Special Section on Environmental Stress Testing (EST)

IEEE TRANSACTIONS ON COMPONENTS, PACKAGING, & MANUFACTURING TECHNOLOGY

Rapid changes in technology accompanied by a desire to fulfill customer
satisfaction within an increasingly competitive global marketplace are two
primary driving forces behind any product reliability improvement
initiative.   Two key elements of a reliability program are the
implementation of an environmental stress testing (EST) regimen and
the parallel development of an effective failure mode analysis (FMA)
effort.  Both EST and FMA, in conjunction with a good failure
tracking and corrective action system, can reduce the incidence of field
failures, and hence cost, and be used to improve design and manufacturing
processes.  The Guest Editors are seeking manuscripts in the areas of EST
and ESS (screening), highly accelerated life testing (HALT) and screening
(HASS).  Topics of interest include, but are not limited to:

* System level reliability of systems subjected to EST

* Economics of stress test sampling/screening in production

* Physics of failure modes found during EST

* Extent of product life degradation by application of EST

* EST Best Common Practices

* Reduction in field failure rates derived from EST

* Correlation of field failures with failures discovered during EST

* Efficacy of applying multiple stresses to product

* High temperature ramp rate liquid EST (LEST) of product

* Effectiveness of single degree of freedom (DOF), tailored vs. 6 DOF,
  random vibration

The Guest Editors of this special section will be:

Paul Englert            S. Rajaram              Harry McLean
AT&T Bell Labs          AT&T Bell Labs          QualMark Corp.
Office 4C-244B          Office 4C-246A          1329 West 121 Ave.
67 Whippany Rd.         67 Whippany Rd.         Denver, Colorado, 80234
Whippany, N.J., 07981   Whippany, N.J., 07981
Phone: (201) 386-6002   Phone: (201) 386-7346   Phone: (303) 254-8800
Fax: (201) 386-2934     Fax: (201) 386-2934     Fax: (303) 254-8343
pe@whserva.att.com      srr@hogpa.att.com


                Proposals are requested by June 15, 1994.

Prospective authors should send 4 copies of a six-page, single-spaced
extended summary by June 15, 1994.  The extended summary will provide a
preliminary screening.  Successful authors will be invited to submit the
complete manuscript by September 1, 1994.  All manuscripts will be peer
reviewed and should follow the IEEE requirements given on the back cover
of any Transactions (4 copies, double-spaced, etc.).  Extended summaries,
manuscripts and inquiries should be submitted to Paul Englert, Rajaram,
or Harry McLean.


----------------------------------------------------------------------------
*ITEM 3.7  Fourth Intersociety Conf. Thermal Phenomena in 
                Electronic Systems - ITHERM 
           Washington, DC,  May 4-7, 1994 
----------------------------------------------------------------------------


This announcement may also be found under Mosaic URL:
http://www.digital.com/pub/conferences/ITHERM.html

                         ITHERM  Conference

                Fourth Intersociety Conference on
        Thermal Phenomena in Electronic Systems - ITHERM
                May 4-7, Washington, DC



                   FEATURED KEYNOTE LECTURE


                The Honorable Al Gore,          U.S. Vice-President

                The Information Superhighway and
                the Role of Government in the 21st Century


    CONFERENCE THEME: "Concurrent Engineering and Thermal Phenomena"

    SESSIONS

    - Single and Mutli-Phase Convective Cooling of
      Components I & II
    - Experimental and Numerical Modeling of Air
      Cooling Devices-I, II & III
    - Temperature Dependent Failures
    - Thermal Phenomena in Peripheral Equipment
    - Papers are fully reviewed and revised prior to presentation

    OPTIONAL PRE-CONFERENCE COURSES & TUTORIAL (see details below)

    - Heat Pipes:  Principles & Applications
    - Fundamentals of Direct Air Cooling
    - Advances in Thermal Modeling of Electronic Components & Systems

    INVITED LECTURES

    - Business Opportunities for U.S. Engineers and Scientists Overseas
        U.S. Commerce Dept.

    - Heat Transfer Engineering in Systems Integration:  Outlook for
    Closer Coupling of Thermal and Electrical Designs of Computers

    - Statistics and Neural Networks in the National Cancer Institute's
    Drug Discovery Program for Cancer and AIDS
        Nat'l Cancer Institute, U.S. Nat'l Institutes of Health

    - Sunracing:  The History of Solar Car Racing . . . Richard J. King,
        Prog. Mgr., Photovoltaics, U.S. Dept. of Energy

    EXHIBITS


                             ADVANCE PROGRAM

                Optional Pre-Conference Courses & Tutorial
                            Wednesday, May 4

                Heat Pipes:  Principles and Applications
                   Course #1 (8:30 A.M. - 11:30 A.M.)

    G.P. "Bud" Peterson  . . . . . . . . . . . . Texas A&M University


                   Fundamentals of Direct Air Cooling
                   Course #2 (8:30 A.M. - 11:30 A.M.)
    Alfonso Ortega . . . . . . . . . . . . . .  University of Arizona
    Robert J. Moffat . . . . . . . . . . . . . . .Standord University

    Advances in Thermal Modeling of Electronic Components and Systems
                     Tutorial (1:00 P.M. - 7:00 P.M.)
    Avram Bar-Cohen  . . . . . . . . . . . .  University of Minnesota
    Michael Pecht  . . . . . . . . . . . . . . University of Maryland
    Robert E. Simons . . . . . . . . . . . . . . . . . . . Consultant

                             Thursday, May 5

                     Welcome (8:00 A.M. - 8:15 A.M.)
    Alfonso Ortega . . . . . . . . . . . . . . . . . .  General Chair

                Keynote Address (8:15 A.M. - 8:45 A.M.)
                    The Information Superhighway and
               the Role of Government in the 21st Century
     Al Gore  . . . . . . . . . . . . . . . . . .  U.S. Vice-President

       Single & Multi-Phase Convective Cooling of Components - I
                   Session 1 (8:50 A.M. - 10:30 A.M.)
    Chairs:  W. Nakayama . . . . . . .  Tokyo Institute of Technology
             J. Fitch  . . . . . . . . . . . . . . . . . . . . .  DEC

    Jet Impingement Boiling of A Dielectric in Narrow Gaps,
      G.M. Chrysler, R.C. Chu, and R.E. Simons,
       ............................................... LSCD, IBM

    Pool Boiling Interactions Between Multiple Heat  Sources
    in an Array of Silicon Chips,
      Stacey E. Balch, Sushil H. Bhavnani, Richard C. Jaeger,
      Sutikshan Bhutani,
       ............................................. Auburn Univ

    Single-Phase and Boiling Cooling of Small Pin Fin Arrays
    by Multiple Slot Nozzle Suction and Impingement,
      David Copeland,
       ........................... Tokyo Institute of Technology

    Effect of Dissolved Gases on Subcooled Flow Boiling from
    Heated Regions with andX without Streamwise Concave Cur-
    vature,
       ........................... Tokyo Institute of Technology
      Pey-Shey Wu, Terrence W. Simon
       ...................................... Univ. of Minnesota

    Gas-Assisted  Evaporative  Cooling of High Density Elec-
    tronic Modules,

      Avram Bar-Cohen, Greg Sherwood*, Marc Hodes,
       ................................. Univ. of Minnesota, *3M


                 Coffee Break (10:30 A.M. - 10:45 A.M.)


      Experimental & Numerical Modeling of Air Cooling Devices - I
                   Session 2 (10:45 A.M. - 12:25 P.M.)
    Chairs:  C. Amon . . . . . . . . . . . Carnegie-Mellon University
             D. Nelson . . . . . . . . . . . . . . . .  Virginia Tech

    Local and Average Transfer Coefficients  on  a  Vertical
    Surface Cooled by a Piezoelectric Fan,
      Roger R. Schmidt
       ............................................... LSCD, IBM

    Heat  Transfer  from Electronic Components on Conducting
    Boards in Small Enclosures,
      Balwant Singh Lall, Alfonso Ortega,
       ........................................ Univ. of Arizona

    A Numerical Investigation  of  Conjugate  Heat  Transfer
    from  a  Flush  Heat  Source  on  a  Conductive Board in
    Laminar Channel Flow
      Ramesh Sugavanam, Alfonso Ortega, Chris Y. Choi
       ........................................ Univ. of Arizona

    Thermal Modeling of Isothermal Cuboids  and  Rectangular
    Heat Sinks Cooled by Natural Convention
      R.J. Culham, M.M. Yovanovich, S. Lee*
       ........................................ Univ. of Arizona
      Univ. of Waterloo, *Avid Engineering

    Advanced Workstation Air Injection and Forced Convection Cooling
    over Single and Multi-Chip Modules:
    A Computational Study
    Vinod Kamath,
     ..................................................... IBM


                     Lunch (12:30 P.M. - 2:00 P.M.)

                             Luncheon Talk

    Heat Transfer Engineering in Systems Integration:  Outlook for
    Closer Coupling of Thermal and Electrical Designs of Computers
    Prof. Wataru Nakayama, Tokyo Institute of Technology
                   Extending the Limits of Air Cooling
                     Panel I (2:15 P.M. - 3:15 P.M.)
    Moderator:  Alfonso Ortega . . . . . . . .  University of Arizona

                   Coffee Break (3:15 P.M. - 3:30 P.M.)

                     Temperature Dependent Failures
                   Session 3 (3:30 P.M. - 5:10 P.M.)
    Chairs:  E. Suhir  . . . . . . . . . . . . . . . . AT&T Bell Labs
             S. Rajaram  . . . . . . . . . . . . . . . AT&T Bell Labs

    Predicting  Thermal  Contact  Resistance in Circuit Card
    Assemblies
      Scott H. Kunkel, Wiley M. Peck, E-Systems,
       ......................................... Melpar Div., VA

    Modeling of Thermal Vias in Thin Film Multichip Modules
      Filip Christiaens, Eric Beyne, Jan Berghmans*
       ....................... IMEC and Katholieke Univ. Lueven*

    Transient Thermal Behavior of a Board Mounted  160  Lead
    Plastic Quad Flat Pack During Assembly and Environmental
    Stress Screening
      J. Lohan, M. Davies
       ....................................... Univ. of Limerick

    Nonlinear      Finite      Element     Simulation     of
    Thermoviscoplastic Deformatio of  C4  Solder  Joints  in
    High Density Packaging under Thermal Cycling
      Bor Zen Hong, Lloyd G. Burrell
       ..................................................... IBM

    Optimizing Adhesive Thickness for Die Bonding
      Karl E. Hokanson, Avram Bar-Cohen
       ...................................... Univ. of Minnesota


                     Dinner (6:00 P.M. - 7:30 P.M.)

                               Dinner Talk

    Statistics and Neural Networks in the National Cancer Institute's
    Drug Discovery Program for Cancer and AIDS . . . . . . . . . . .



                              Friday, May 6


                 Keynote Address (8:00 A.M. - 8:45 A.M.)
    Business Opportunities for U.S. Engineers and Scientists Overseas
                        U.S. Commerce Department

      Experimental & Numerical Modeling of Air Cooling Devices - II
                   Session 4 (8:50 A.M. - 10:30 A.M.)
    Chairs:  B. Sammakia  . . . . . . . . . . . . . . . . . . . . IBM
             K. Torrance  . . . . . . . . . . . .  Cornell University

    A Concurrent Engineering Methodology: Application to De-
    sign and Analysis of the Navigtor Wearable Computer Sys-
    tem
      Asim Smailagic, Jay S. Nigen, Daniel P. Siewiorek,
      Cristina H. Amon
       ................................... Carnegie Mellon Univ.

    E-Systems Cooling Performance of  Plat-Fins  for  Multi-
    Chip Modules
      Hideo Iwasaki, Tomiya Sasaki, Masaru Ishizuka
       ................................................. Toshiba

    THERMAP:  A Thermal Model for Microprocessors
      John Fitch, Louis Monier, Herve Tamet
       ....................................... Digital Equipment

    Coarse and Detailed CFD Modeling of a Finned Heat Sink
      D. Agonafer, Ronald L. Linton,
       ..................................................... IBM

    Prediction  of Flow in Cooling of Electronic Devices and
    Components
      Nilufer Egrican, Seyhan Uygar
       ................................ Istanbul Technical Univ.


                 Coffee Break (10:30 A.M. - 10:45 A.M.)


      Single and Multi-Phase Convective Cooling of Components - II
                   Session 5 (10:45 A.M. - 12:25 A.M.)
    Chairs:  R. C. Chu  . . . . . . . . . . . . . . . . . . . . . IBM
             S. Bhavnani  . . . . . . . . . . . . . Auburn University

    Effect of Channel Width on Pool Boiling from a Microcon-
    figured Heat Sink
      Ronald M. Nowell, Sushil H. Bhavnani, Richard C. Jaeger,
       ............................................. Auburn Univ

    Spray Cooling for the 3-D Computer
      D.E. Tilton, C.L. Tilton, Clifford Moore, Randy Ackerman,
    Single-Phase Heat Transfer Characteristics of  Submerged
    Jet Impingement Cooling Using  JP-5
      M.R. Pais, J.E. Leland*, W.S. Chang*, L.C. Chow**
       .. Cudo Technologies, *Wright-Patterson AFB, **Univ. of Kentucky

    Enhancement  of  Two-Phase Thermosyphon for Cooling High
    Flux Power Devices
      Heikichi Kuwahara, Kenji Takahashi, Tadakatsu Nakajima,
      Osamu Suzuki
       ............................................... Hitachi

    Measurements of  Air  Velocity  and  Temperature  Around
    Three Rectangular Naturally Convecting Fin Arrays
      P. Rodgers, M. Davies
       ..................................... Univ. of Limerick


                     Lunch (12:30 P.M. - 2:00 P.M.)

                              Luncheon Talk

               Sunracing:  The History of Solor Car Racing
    Richard J. King . . . . . . . . . . . . . . . .  Program Manager,

              Computer-Aided Thermo-Mechanical Engineering


                    Panel II (2:15 P.M. - 3:15 P.M.)
    Moderator:  Dereje Agonafer . . . . . . . . . . . . . . . . . IBM

                  Coffee Break (3:15 P.M. - 3:30 P.M.)

     Experimental & Numerical Modeling of Air Cooling Devices - III
                   Session 6 (3:30 P.M. - 4:50 P.M.)
    Chairs:  R. Wirtz . . . . . . . . . . . . .  University of Nevada
             M. Tirumala  . . . . . . . . . . . . . . . . . . . Intel

    Entrance Analysis of  Turbulent  Flow  in  an  Array  of
    Heated Rectangular Blocks
      M. Faghri, M. Molki, J. Chrupcala, Y. Asako*
       ....... Univ. of Rhode Island, *Tokyo Metropolitan Univ

    Criteria  for Approximating a Layer in Three Dimensional
    Tharmal Models of Multilayer Micrelectronics
      K.E. Creel, D.J. Nelson,
       ......................................... Virginia Tech

    Finding Unknown Surface Temperatures and Heat Fluxes  in
    Steady State Heat Conduction
      T.J. Martin and G.S. Dulikravich,
       ...................................... Penn State Univ.

    A  Computational  Model  For  Chemical  Vapor Deposition
    Process in Industrial Reactors
      A. Krishnan, N. Zhou, and A. Przekwas,
       ........................................ CFD Res. Corp.

    A Non-Dimensional Correlation for the  External  Thermal
    Characteristics of Surface Mount Metal Quad Flat Packs
      H. Shaukatullah, M. Gaynes, and L. H. White,
       ..................................................... IBM



                             Saturday, May 7

                         Breakfast (7:30 A.M.)

           Heat Transfer Trends for Future Microprocessors and
                            Computer Systems
                    Panel III (8:00 A.M. - 9:00 A.M.)
    Moderator:  Avram Bar-Cohen . . . . . . . University of Minnesota

                  Coffee Break (9:00 A.M. - 9:15 A.M.)

               Thermal Phenomena in Peripheral Equipment
                   Session 7 (9:15 A.M. - 11:00 A.M.)
    Chairs:  C. C. Lee  . . . . . . University of California - Irvine
             R. Jeager  . . . . . . . . . . . . . . Auburn University

    Thermal Limitations in Optical Recording
      Kenneth E. Creel, Douglas J. Nelson,
       ......................................... Virginia Tech

    Temperature  Distribution in Semiconductor Wafers Heated
    in a Hot-Wall-Type Rapid Diffusion Furnace
      Shigeki Hirasawa, Tomoji Watanabe, Tetsuya Takagaki,
      Toshiyuki Uchino
       ............................................... Hitachi

    Thermal and Flow Analysis of an Actuator for  Hard  Disk
    Drives
      W. Prater, H-M Tzeng*
       ................................................... IBM

    Experimental  Study  on  the Dynamic Thermal Strain of a
    Disk-Drive Actuator
      Huey-Ming Tzeng
       ................................................... IBM

    Analytical/Computational Studies of the  Ground  Thermal
    Characteristics For Underground Battery Vault Uperations
      Michael R. Cosley, Maurice J. Marongiu*,
       .. Reliance Comm/Tec, *Illinois Institute of Technology


                  Adjournment (11:00 A.M. - 11:15 A.M.)


  +-----------------------------------------------------------------+
                        Registration Information
    COSTS
        IEEE Memebers in advance        $350
        Nonmembers in advance           $400
        IEEE Members at conference      $400
        Nonmembers at conference        $450

    TUTORIAL AND COURSE COSTS
        $200 per tutorial or course or
        $350 for tutorial plus one course

    For registration and information contact:

        Chappell Enterprises
        phone and fax:  408-662-1936
        email: tnchappell@aol.com

  +-----------------------------------------------------------------+

  +-----------------------------------------------------------------+
  |                     Preview the Proceedings                     |
  | Now you can look over the proceedings the week before the       |
  | conference begins.  At your request, we will ship your copy by  |
  | Priority Mail (U.S.) or courier (outside U.S.) on approximately |
  | April 26.  This way you can browse through it on the plane and  |
  | show it to colleagues for suggesting discussion questions at the|
  | conference.  The charges for this service are:  $15 U.S. and    |
  | Canada and $30 elsewhere.  Circle the appropriate amount on the |
  | registration form and add it to the total payment.              |
  +-----------------------------------------------------------------+

  +-----------------------------------------------------------------+
  |                     Pre-Conference Course #1                    |
  |                                                                 |
  |             Heat Pipes:  Principles and Applications            |
  | G.P. "Bud" Peterson . . . . . . . . . . . .  Texas A&M Universit|
  |                                                                 |
  |                 Wednesday, 8:30 A.M. - 11:30 A.M.               |
  |                                                                 |
  | A description of the theoretical principles of heat pipe opera- |
  | tion will be discussed, as well as heat pipe limitations.  The  |
  | selection of heat pipe materials and materials compatibility    |
  | problems will be examined.  Heat pipe design, fabrication, and  |
  | testing procedures will be thoroughly reviewed.  A variety of   |
  | special heat pipes and specific heat pipe applications will be  |
  | presented and discussed with particular emphasis on applications|
  | in the electronics industry.  Emphasis will be placed on the    |
  | capabilities and limitation of the heat pipe as a heat transfer |
  | device.                                                         |
  |                                                                 |
  | Tutorial fee of $200 includes lecture notes and refreshments.   |
  +-----------------------------------------------------------------+

  +-----------------------------------------------------------------+
  |                      Pre-Conference Course #2                   |
  |                                                                 |
  |                Fundamentals of Direct Air Cooling               |
  |           Prof. Alfonso Ortega, University of Arizona           |
  |               Robert J. Moffat, Stanford University             |
  |                                                                 |
  |                 Wednesday, 8:30 A.M. - 11:30 A.M.               |
  |                                                                 |
  | We will emphasize an understanding of board and package-level   |
  | thermal management by examining experimental data and thermal   |
  | modeling methodologies.  The course will be particularly useful |
  | for individuals working in electronics packaging who may not cur|
  | rently be performing thermal analysis but who desire an introduc|
  | tion to air cooling fundamentals.  It is based on the instructor|'
  | chapter in Advances in Thermal Modeling of Electronic Components|
  | and Systems, Volume One.  The instructors will discuss important|
  | findings of the past five years in convective cooling of elec-  |
  | tronics, including:                                             |
  |                                                                 |
  | - Convective fundamentals                                       |
  | - The convective heat transfer coefficient in air cooled        |
  |   electronics                                                   |
  | - Forced convection cooling of components on PCBs               |
  | - Natural convection and radiation cooling                      |
  | - Heat transfer in small enclosures                             |
  | - Conjugate heat transfer                                       |
  |                                                                 |
  | The fee of $200 will include a copy of the book Advances in     |
  | Thermal Modeling of Electronic Components and Systems, Volume On|
  | (or another volume in the series if the student already owns thi|
  | volume), lecture notes, and refreshments.                       |
  +-----------------------------------------------------------------+

  +-----------------------------------------------------------------+
  |                      Pre-Conference Tutorial                    |
  |                                                                 |
  | Advances in Thermal Modeling of Electronic Components and System|
  | Prof. Avram Bar-Cohen  . . . . . . . . .  University of Minnesot|
  | Prof. Michael Pecht  . . . . . . . . . .   University of Marylan|
  | Robert E. Simons . . . . . . . . . . . . . . . . . . . Consultan|
  |                                                                 |
  |                 Wednesday, 1:00 P.M. - 7:00 P.M.                |
  |                                                                 |
  | Design, analysis and optimization must address both performance |
  | and reliability targets.  This adds the requirement for detailed|
  | thermomechanical modeling of thermally-induced failure mechanism|
  | to the more traditional concern about heat removal.             |
  |                                                                 |
  | - Thermal and thermomechanical aspects of the physical design   |
  |   process                                                       |
  | - Causes for thermally-induced mechanical chemical and electrica|
  |   failures in ICs                                               |
  | - In-depth review of relevant 1989/90 literature                |
  |                                                                 |
  | Lectures based on chapters in Advances in Thermal Modeling of   |
  | Electronic Components and Systems.  The $200 fee includes copies|of
  | volume III.                                                     |
  +-----------------------------------------------------------------+

  +-----------------------------------------------------------------+
  |                      Special Air Fare Rates                     |
  | Delta Air Lines is offering special discount rates for I-THERM  |
  | attendees.  They are available only by calling the following    |
  | number:  1-800-241-6760, 8:00 A.M. to 11:00 P.M. EDT daily.     |
  | Refer to Delta #01147.  Seats are limited and certain restric-  |
  | tions may apply.                                                |
  +-----------------------------------------------------------------+

  +-----------------------------------------------------------------+
  | The Washington Hilton and Towers is near such attractions as the|
  | White House, the Capitol, the Air & Space Museum and the Nationa|
  | Archives (Declaration of Independence and Constitution on displa|).
  | The weather in May is delightful with highs in the 70s.         |
  +-----------------------------------------------------------------+

  +-----------------------------------------------------------------+
  |                      Coffee Break Sponsors                      |
  |                                                                 |
  | Your company can help sponsor a coffee break and inform attendee|
  | about your products and services.  Your company's name will be  |
  | included in the final program and be displayed on a sign in the |
  | break area.  Company literature will be displayed on a table    |
  | nearby.  Sponsorship fee is $150.                               |
  |                                                                 |
  |         To participate, call John Fitch at 415-617-3314.        |
  |             or contact him at fitch@pa.dec.com
  +-----------------------------------------------------------------+

                        I-THERM '94 COMMITTEE

    General Chair
      Alfonso Ortega  . . . . . . . . . . . . . University of Arizona
    Program Chair
      Dereje Agonafer . . . . . . . . . . . . . . . . . . . . . . IBM
    Program Vice-Chair
      Sushil Bhavnani . . . . . . . . . . . . . . . Auburn University
    Administration
      John Fitch  . . . . . . . . . . . . . . . . . Digital Equipment
    Local Arrangements
      Doug Nelson . . . . . . . . . . . . . . . . . .  Virginia Tech.
    Japanese Liaison
      Wataru Nakayama . . . . . . . . . Tokyo Institute of Technology
    Far East Liaison
      Sung-Tack Ro  . . . . . . . . . . . . Seoul National University
    European Liaisons
      Eric Beyne  . . . . . . . . . . . . . . . . . . . . . . .  IMEC
      C.J.M. Lasance  . . . . . . . . . . . . . . . . . . . . Philips
    Program Committee
      Christina Amon  . . . . . . . . . .  Carnegie-Mellon University
      Avram Bar-Cohen . . . . . . . . . . . . University of Minnesota
      Richard Jaeger  . . . . . . . . . . . . . . . Auburn University
      Chin C. Lee . . . . . . . . . University of California - Irvine
      Robert Moffat . . . . . . . . . . . . . . . Stanford University
      Sevgin Oktay  . . . . . . . . . . . . . . . . . . . . . . . IBM
      B.P. "Bud" Peterson . . . . . . . . . . . . . . . . . Texas A&M
      Subramani Rajaram . . . . . . . . . . . . . . .  AT&T Bell Labs
      Ephraim Suhir . . . . . . . . . . . . . . . . .  AT&T Bell Labs
      Kenneth Torrance  . . . . . . . . . . . . .  Cornell University
      Richard Wirtz . . . . . . . . . . . University of Nevada - Reno



----------------------------------------------------------------------------
*ITEM 3.8  INTERNATIONAL CONFERENCE ON SOLDER FLUX AND PASTE 
           Atlanta, GA, JUNE 1-3, 1994
           Submitted by Laura Turbini
----------------------------------------------------------------------------


                               JUNE 1-3, 1994

             INTERNATIONAL CONFERENCE ON SOLDER FLUX AND PASTE

                      Georgia Institute of Technology
                         Atlanta, GA   30332-0245

June 1 - A.M.

  8:45 -    Welcome -  Dr. Laura J. Turbini
                           Georgia Tech, Conference Chairman

  Residue Detection - Session Chairman, Dave Bergman, IPC

          9:00 A.M.    "Quick Look Results of New Fluxes for Peoples Set in
                       Their Ways",
                       Jim D. Raby, Soldering Technology International, Inc,

         9:30 A.M.    "Effect of Flux Residue on Electrical Testing",
                       John L. Snyder, Alpha Metals, Inc.

         10:00 A.M.   Break

         10:30 A.M.   "Qualitative Chemical Analyses of Glycols & Polycols
                       in Soldering Fluxes & Solder Creams",
                       Al R. Nabhani, V.P. Research & Development E.S.P.

         11:00 A.M.   "A Model of the Solder Flux Reaction; Reactions at the
                       Metal/Metal Oxide/ Electrolyte Solution Interface"
                       Margaret Nasta, Advanced Devices and Materials Group,
                       Carnegie Mellon Research Institute

         11:30 A.M.   "Microstructure of Conductive Anode Filaments Formed
                       During Accelerated Testing of Printed Wiring Boards",
                       W.J. Ready, Georgia Institute of Technology

       12:00 - 1:30   Lunch

Test Methods - Session Chairman, Alvin Schneider, Alpha Metals

         1:30 P.M.    "Effect of Temperature & Humidity on Long Term
                       Reliability Assessment of No-Clean Fluxes",
                       Kuan-Shaur Lei, Compaq Computer Corp.


         2:00 P.M.    "The effect Choosing the Optimal Temperature and
                       Humidity Conditions to Assess the Corrosive Properties
                       of Flux Residues", M. Ramanachalan, Georgia Institute
                       of Technology

         2:30 P.M.    "Developing a New Method to Identify the Corrosivitity
                       of No Clean Flux Cored Solder Wires Residues",
                       X. Lambert, Direction Recherce & Development,
                       Laboratoire CAMI

         3:00 P.M.    Break

         3:30 P.M.    "How Clean Is Clean: Optimization of Extraction/Ion
                       Chromatography Parameters for No-Clean Flux Residue
                       Detection", Vicki Heideman, GM Delco

         4:00 P.M.    "How Clean is Clean: Direct Methods of Flux, Residue
                       Detection", Mark Koch, Sandia National Laboratories

         4:30 P.M.    "Weak Organic Acids and Surface Insulation Resistance",
                       John E. Sohn, AT&T Bell Laboratories

June 2, 1994

No Clean Process, Part I, Session Chairman, Les Hymes, The Complete Connection

       8:30 A.M.     "Precision Application of Low Solids Flux with Ink Jet
                      Technologies", Brad Stoops, Precision Dispensing

       9:00 A.M.     "Conformal Coating Adhesion Over No-Clean Fluxes",
                       Tim Crawford, EMPF

       9:30 A.M.     "Qualification of a No Clean Reflow Process for
                      Manufacturing of Injection & Over Molded High
                      Voltage Relays for PWA Mounting",
                      Tim Pitsch, Electronic Assembly Corp.

       10:00 A.M.    Break

Hand Soldering, Session Chair, Kathi Johnson, Hexacon

        10:30 A.M.   "Manufacture of High Frequency Medical  Equipment With
                      A No Clean Hand Soldering Process",
                      David A. Stumpf P.E., Medical  Advances, Inc.

        11:00 A.M.   "No Clean Handsoldering Evolves to No Residue",
                       Todd Fetterolf, Interflux USA, Inc.

        11:30 A.M.   "Finding ODS Alternatives for the Repair of Military
                      Electronics", L.J. Turbini, Georgia Inst of Technology

     12:00 - 1:30    Lunch

       1:30 - 2:30 P.M.    Panel Discussion, "Hand Soldering and Repair"
                           Kathi Johnson, Hexacon

       2:30 - 3:00 P.M.    Break

       3:00 - 4:00 P.M.    Panel Discussion, "Process Implementation"
                           Les Hymes, The Complete Connection

       4:00 - 7:00 P.M.    Poster Session
                           Company Exhibits

       5:30 - 7:00 P.M.    Reception

Friday, June 3

No Clean Process, Part II, Les Hymes

       8:30 A.M.     "Use of Low Residue Flux in a Military Electronics
                     Program",
                     Ralph Vaughan, Rockwell International

       9:00 A.M.     "Innovations in the Development of Ambient & Nitrogen
                      Reflow No Clean Solder Pastes" , Esin Busche,
                      Litton: Kester Solder

       9:30 A.M.     "Benefits of Using a Synthetic Resin in No Clean Solder
                      Paste Formulation", Paul Niemczura, Heracus, Inc.

       10.00 A.M.    Break

Environmental Issues, Kathi Johnson, Hexacon

       10:30 A.M.    "A Novel Pb-Free Solder for Electronic Industries",
                      James A. Slattery, Indium Corp. of America

       11:00 A.M.    "Design Considerations of No Clean Fluxes Used to
                      Eliminate VOC Emissions", Robert L. Gilbert,
                      Multicore Solders, Inc.

       11:30 A.M.    "Conductive Polymer Bonding Process As An Alternative
                      to Tin/Lead Soldering", R. Carpenter, Alpha Metals

                  INTERNATIONAL CONFERENCE ON SOLDER FLUXES AND PASTES
                             GEORGIA INSTITUTE OF TECHNOLOGY
                                    ATLANTA, GEORGIA
                                   June 1, 2, 3, 1994

                                      REGISTRATION

NAME_______________________________________________________________________

TITLE______________________________________________________________________

COMPANY____________________________________________________________________

ADDRESS____________________________________________________________________

___________________________________________________________________________

COUNTRY____________________________________________________________________

PHONE_____________________FAX_________________________


REGISTRATION                                    $425 (before May 16)
                                                $450 (after May 16)
FACULTY RATE                                    $100
STUDENT RATE                                    $ 50
COMPANY EXHIBIT FEE                             $175

(Registration fee includes proceedings, continental breakfasts, coffee
breaks, reception on Thursday evening)

PROCEEDINGS ONLY                                $100

Make checks payable to Georgia Institute of Technology Mail payment
and completed registration form:
 __ Payment enclosed                         Solder Fluxes and Pastes
 __ Bill my company (attach purchase order)  Georgia Tech Continuing Ed-R
 __ This confirms my phone reservation       Georgia Institute of Tech
Charge to   __ VISA    __ MasterCard         Atlanta, Georgia 30332-0385
                                                       (404)894-2400
                                                    FAX (404) 894-8925
Card number____________________Expiration Date____________
Card holders Name__________________________________________

A block of rooms has been reserved at the Atlanta Renaissance Hotel,
located at the corner of West Peachtree and North Avenue, NE Atlanta,
GA 30308 at a special rate of $85 single/double occupancy per night.
For reservations call 1-800-633-0000 or (404) 881-6000.  Refer to the
Georgia Tech Solder Fluxes and Paste Conference when making your
reservation.
------------------------


----------------------------------------------------------------------------
*ITEM 3.9  16th Int. Electronics Manufacturing Technology Symposium 
           San Diego, CA,  Sept. 11-14, 1994 
----------------------------------------------------------------------------

The 1994 IEMT Symposium will hold a day-long Product and Exhibit
Demonstration Session Tuesday, Sept. 13, 1994.  Companies and suppliers
involved in materials and chemicals, equipment and systems related to
design, production, reliability for manufacturing as well as companies
offering contract production and assembly services will offer information
as well as product demonstrations.

The IEMT SYmposium is considered the leading international forum presenting
the latest information on the applications of products and technologies
for use in the manufacturing of electronic components, single and multichip
packages, printed circuit boards, assemblies and systems.

Attendees (worldwide) at the Symposium include engineers and managers involved
in 
    1.  Manufacturing Issues (setup, equipment selection, installation,
        maintenance, inspection, testing methods, yield enhancement
        through process control, rework, reliability, quality control,
        environmental issues, costs),

    2.  Manufacturing Implementation (foundries, "shops", contract houses),

    3.  Integrating Design and Manufacturing (concurrent engineering, 
        concurrent engineering CAD tools and frameworks, tools for 
       improving design-to-product implementation, intelligent computer
        controlled systems), and

    4.  Improvements in Manufacturing Operations.
Attendees are involved in "hands-on" laboratory, production, and manufacturing
activities on a daily b asis.

Participation in the Product and Exhibit Demonstrations will be on a first-come,
first served basis.  The fee for participation is $800 fee and includes
exhibiting space and one Symposium registration.

For further information and participation, please contact:
    Dr. Daryl Ann Doane
    DAD Technologies, Inc.
    P.O. Box 2915
    La Jolla, CA 92038
         (Fed Express:  6438 La Jolla Scenic So., La Jolla, CA 92037) 
    Tel: (619)459-6795
    Fax: (619)459-4343
    d.doane@ieee.org   
    
----------------------------------------------------------------------------
*ITEM 3.10  3rd Topical Meeting: Electrical Performance of Electronic Packaging 
           Monterey, CA,  Nov. 2-4, 1994 
           CALL FOR PAPERS:  Due Date June 20, 1994.
----------------------------------------------------------------------------

CPMT and MTT Societies of IEEE are preparing the 3rd Topical Meeting on
Performance of Electronic packaging for Nov. 2-4, 1994.  The meeting is
co-chaired by Andreas Cangellaris of the University of Arizona and V.K.
Tripathi of Oregon State University.  The meeting will be held in Monterey
California.

The general subject of the meeting is the electrical design, analysis, and
characterization of electronic interconnections and packaging for performance-
driven, high-seed/high complexity electronic systems.  The following topics 
covering chip-to-chip and on-chip interconnections will be covered.

   * Package analysis, algorithms, electro-magnetic, transmission line
     techniques.
   * New interconnect and packaging structures.
   * RF/Microwave structures and performance.
   * MMIC modules and high density packaging.
   * Experimental characterization techniques and testing methods.
   * EMC/EMI effects.
   * Limits of performance.
   * Design and routing methods.
   * Low cost, high volume packaging
   * Optoelectronic packaging.

Additional information can be obtained from 
    V.K. Tripathi
        Tel: (503)737-2988
        Fax: (503)737-1300
        E-mail: vkt@ece.orst.edu

    or

    A. Cangellaris
        Tel: (602)621-4521
        Fax: (602)621-2999
        E-mail: cangellaris@ece.arizona,edu

Authors should submit a 35-word abstract with summary not to exceed 3
pages by June 20 to
    EPEP'94
    Engineering Professional Development
    University of Arizona
    Box 9 Harvill Building, Room 235
    Second and Olive Streets
    Tucson, AZ 85721



----------------------------------------------------------------------------
*ITEM 3.11  2nd VLSI Packaging Workshop of Japan 
           Kyoto, Japan,  Nov. 30 - Dec 2, 1994
            CALL FOR PAPERS:  Due date June 30, 1994 
----------------------------------------------------------------------------

The IEEE CPMT Society and the National Institute of Standards and Technology
are jointly sponsoring the Second VLSI Packaging Workshop of Japan, to be
held in Kyoto, Japan.

All attendees are expected to be specialists in the field and to participate
in discussions.  The Workshop will be held in English and conducted in single,
sequential sessions so that attendees will be able to hear every paper.  Each
talk is 30 minmutes total, including up to 10 minutes for questions and
discussions.

Papers presenting new developments of critical overviews in the following
areas are solicited.

   * High density (thin and small) package.
   * MCMs, especially its cost reduction.
   * Avanced packaging for high performance microprocessors.
   * Modeling, simulation and measurement on high speed signals.
   * Production process for high density packages.
   * Known-good-die (bear chip testing and quality assurance).
   * Material technology with low-cost, including plastic compound.
   * Manufacturing equipment for fine pitch package, especially molded-
     led frame packages.
   * Packaging for mobile communication devices.
   * Advanced packaging.

PAPER SUBMISSION:
A 300 word abstract should be sent to either
   Akira Kojima
   Semiconductor Production Technology Center
   Sony Corporation
   4-14-1, Asahi-cho
   Atsugi-shi Kanagawa-ken, 243 JAPAN
   Fax: +81 462 30 6268

          or

   Hisashi Tomimuro
   Electron Devices Laboratories
   NTT Applied Electronics Laboratories
   9-11 Midori-cho
   3-chome Musashino-shi
   Tokyo, 180 JAPAN
   Fax: _81 422 59 2164

Authors in the USA may submit to
   Justin Bolger
   Metrix Corp.
   77 Charles Street
   Needham Heights, MA 02194
   Fax: (617) 455-8163

10 copies of the abstract for review must be received by June 30, 1994.  The
abstract, supplemented with up to four of your most important figures, will
be given to all attendees.  Authors will be notified of paper acceptance by the
end of August, 1994.

----------------------------------------------------------------------------
*ITEM 3.12  1994 Government Microcircuit Applications Conference (GOMAC) 
           San Diego, CA, Nov. 7-10, 1994
----------------------------------------------------------------------------

The GOMAC'94 Conference theme will focus on the experiences that both 
government and industry have had in either aapting technology developed
for military markets in civilian applications or utilizing technology
developed in the civilian economy for military applications.  Both successes
and lessons learned are of interest.  When dual use is the goal of both
technology development and eventual application, the concepts required to 
meet this objective must be implemented in the initial development stage.
What is the impact of dual use on the civilian market and on military
systems?  DOes all the compromise have to be on the military side because
its market share is smaller?  What are the minimal military application
requirements that dual-use technologies must meet?  It is expected that
examination of both uses will reveal basic characteristics important to
the economic well being of the country during the transition from a
cold-war military to one that is leaner, more flexible, and in a constant
state of readiness.

Suggested topics include the following:  Advanced packaging, agile 
manufacturing, automated testing/testability, avionics, CAD/CAM/CAE/CASE,
concurrent technology, display technology, ASICs, AI, biomedical
electronics, cellular communications, computer systems, dual-use
technologies, emerging technologies, fault-tolerant systems, integrated
sensors, microelectronics insertion, micromechanics, MMIC technology,
neural networks, optoelectronics, photonics, Rad/SEU-hard electronics,
rapid prototyping, reliability/quality assurance, signal processing,
spacecraft electronics, superconducting electronics, technology
conversions, upgrading fielded systems, virtual reality, wafer scale
integration.

GOMAC is sponsored by the Dept. of Defense, NASA, NIST, NSA, DOE, ARPA,
and other government agencies.

For further information, contact
   Harry Weaver, General Conf. Chair
   Sandia National Laboratories
   Division 1321
   Albuquerque, NM 87185
   Tel: 505/844-8145
   Fax: (301)688-0715

     or
 
   Sven Roosild, Technical Prog. Chair
   ARPA
   3701 North Fairfax Dr.
   Arlington, VA 22203-1714
   Tel: 703/696-2235
   Fax: 703/696-2201
   Email: sroosild@arpa.mil

----------------------------------------------------------------------------
*ITEM 3.13 Leos'94: 7th Annual Meeting (IEEE Lasers and Electro-Optics Society) 
           Boston, MA  (Co-located with OPTCON '94), Oct. 31 - Nov 3, 1994
           CALL FOR PAPERS:  Due date June 3, 1994
----------------------------------------------------------------------------

This conference, co-located with OPTCON'94, is the Annual Meeting of the IEEE
Lasers and Electro-Optics Society (LEOS).  The conference incorporates
invited papers, topical symposia, and contributed technical papers addressing
a broad spectrum of topics of interest to members of LEOS.  The program is
designed to encourage discussion of the critical issues related to the
application of lasers and electro-optic technologies in such areas as
   * Electro-Optic Sensors and Systems.
   * Fiber and Optic Technology.
   * Integrated Optics and Optoelectronics.
   * Nonlinear Optics.
   * Optical Communications.
   * Optical Switching and Processing.
   * Optoelectronic Packaging, Manufacturing and Reliability.
   * Semiconductor Lasers
   * Short Wavelength and Gas Lasers.
   * Solid State Lasers.
   * Ultrafast Optics and Electronics.

Alan Mickelson, University of Colorado, Boulder Colorado is the subcommittee
chair for Optoelectronic Packaging, Manufacturing, and Reliability.

Original papers that have not been previously presented and which describe new
technical contributions to the areas covered by the technical descriptions are
solicited.  Papers will be selected by the LEOS '94 program committee based on
technical content described in the submitted abstract and summary.  Each author
is required to complete and submit the following:
   * Specification of category in items above.
   * 35 word abstract (to be printed in the LEOS'94 advance program)
   * 2-page camera-ready paper - please submit original to be printed in
     the LEOS'94 Proceedings and a copy of the paper.
   * Full address, telephone, fax, and e-mail
to:
   LEOS'94 Program - IEEE/LEOS
   445 Hoes Lane, PO Box 1331
   Piscataway, NJ 08855-1331
   Tel: (908) 562-3897

----------------------------------------------------------------------------
*ITEM 3.14  JOURNAL OF MICROELECTRONIC SYSTEM INTEGRATION 
           Submitted by S. Tewksbury
----------------------------------------------------------------------------


     The JOURNAL OF MICROELECTRONIC SYSTEM INTEGRATION is devoted 
     to in-depth descriptions of major microelectronic system
     R&D projects and focussed descriptions of new principles related to the
     design and realization of high performance microelectronic systems.  The
     journal is published quarterly by Plenum Press.
    

                                  EDITOR
 
	                      Stuart K. Tewksbury	
	               Microelectronic Systems Research Center	
               	   Dept. Electrical and Computer Eng.	
                       West Virginia University	
	                  Engineering Sciences Building #827	
                             Morgantown, WV 26506-6101

                    	Tel:    (304)293-6371, ext 512
                        Fax:    (304)293-7486
                        e-mail: skt@msrc.wvu.edu

                           ASSOCIATE EDITORS

 Joe E. Brewer	               R.Mike Lea             John Prince
 Westinghouse Electric Corp.   Dept. Elect. Eng.      Dept. Elect. & Comp. Eng.
 P.O. Box 746                  Brunel University      Univ. of Arizona
 M/S 1670                      Uxbridge, Middlesex    Building 104
 Baltimore, MD 21203           ENGLAND UB8 3PH        Tucson, AZ 85721


****SUBMISSION OF PAPERS AND SUGGESTED TOPICS****

 Papers addressing the general area of microelectronic system integration are
 sought.  Contributed papers will receive full peer reviews.  The editors are
 particularly interested in papers describing advanced prototypes of
 microelectronic systems and descriptions of significant exploratory
 development programs in the areas of technologies and system modeling.

 The Journal publishes both invited papers (generally in-depth reviews of
 major R&D programs at major corporations and research universities) and
 submitted papers.  

SUBMISSION OF CONTRIBUTED PAPERS:  Authors should forward 3 copies of the
  manuscript to the editor at the address below.  The quality should be
  suitable for review and evaluation.  Upon acceptance of a paper, the
  author(s) will be required to submit an electronic file (ASCii or LaTeX)
  of the manuscript.

SUBMISSION OF MATERIAL FOR EVALUATION AS AN INVITED PAPER:  Invited papers
  provide the author(s) with greater latitude in developing their papers
  and provides an opportunity for evaluation of information without
  divulging information to possible competitors (primarily of interest
  to descriptions of large-scale projects by corporations).  Such papers
  will be reviewed by the Editor, without distribution of the material to
  others, to determine whether an invitation to develop a full paper is
  appropriate.  The Editor will work with the author(s), for example, 
  to help adapt internal technical reports or program reports to funding
  agencies to a journal article.  All original information is returned
  to the author and notes and other technical material developed by
  the editor in evaluating the material will be destroyed.  The editor
  provides these safeguards to encourage close cooperation between
  the editor and potential invited authors during the evaluation of
  development of a full paper. 

 ----------------ADVISORY BOARD MEMBERS------------------

   G. Arjavalingham                    Magdy A. Bayoumi
      IBM                                 The Center for Adv. Comp. Studies
      T.J. Watson Res. Center             The Univ. of Southwestern Louisiana
      Room 36-103                         P.O. Box 44330
      Box 218                             Lafayette, LA 70504-4330
      Yorktown Heights, NY 10598
                    
   A.C. Cangellaris                    Bernard Courtois
      Dept. Elect. and Comp. Eng.         CMP/Eurochip
      University of Arizona               TIM3/IMAG/INPG
      Bldg 104, Room 230                  46, Avenue Felix Viallet
      Tucson, AZ 85721                    38031 Grenoble Cedex
                                          FRANCE

   Howard Davidson                     E.E.E. Frietman
      Sun Microsystems                    Dept of Applied Physics
      M/S 29-225                          Delft University of Technology
      2550 Garcia Ave.                    PO Box 5031
      Mountain View, CA 94043             2600 GA Delft
                                          THE NETHERLANDS

   Dennis Herrell                      Susumu Horiguchi
      MCC                                 Dept. of Information Science
      12100 Technology Blvd.              Japan Adv. Inst. Science and Technol.
      Austin, TX 78730                    Tatsunokuchi, Ishikawa 923-12
                                          JAPAN

   Fabrizio Lombardi                   Wojcieck Maly
      Dept. of Computer Science           Dept. of Elect. and Comp. Eng.
      Texas A&M University                Hamerschlag Hall Room 3108
      College Station, TX 77843-3112      Carnegie Mellon Univ.
                                          Pittsburgh, PA 15213-3890

   David Meyer                         James Murphy
      International Business Machines     ARPA
      Federal Sector Division             3701 N. Fairfax Dr.
      M/S 120-023                         Arlington, VA 22203
      9500 Godwin Drive                
      Manassas, VA 22110                

   Herbert  Reichl                     Mariagiovanna Sami
      Inst. fur Hochfrequenztechnik       Dipart. di Electrronica e Informazione
      Technische Universitat Berlin       Politechnico di Milano
      Einsteinufer 25                     Piazza Leonardo Da Vinci 32
      D-1000 Berlin 10                    20133 Milano
      Federal Republic of Germany         ITALY

   Jean-Francois Santucci              Walter J. Schoppe
      Laboratoire dUEtude et de           Naval Air Development Center
         Recherche en Information         Code 40F 
         (L.E.R.I.)                       Warminster, PA 18974-5000
      Parc Scientiique G. Besse          
      30000 Nimes                    
      FRANCE          

   Earl Swartzlander                   Peter W. Wyatt
      Dept. Electrical & Computer Eng.    Digital Integrated Circuits Group
      University of Texas at Austin       Lincoln Laboratory
      Eng. Science Building # 517         244 Wood Street
      Austin, TX 78712-1084               Lexington, MA 02173-0073



       ----------------EDITORIAL BOARD MEMBERS--------------
 
   Charles E. Bauer                    Raul Camposano
      TechLead Corporation                GMD/EIS
      31321 Island Drive                  Schloss Birlinghoven
      Evergreen, CO 80439                 Postfache 1240
                                          GERMANY

   Glenn H. Chapman                    Phillip Christie
      School of Engineering Science       Electrical Engineering Dept.
      Simon Fraser University             University of Delaware
      Burnaby, British Columbia           Newark, Delaware 19716
      CANADA V5A-1S6                    

   Randy Frank                        Paul Franzon
      Discrete and Materials             Dept. of Electrical and Computer Eng.
              Technol. Group             North Carolina State University  
      Motorola Semiconductor             P.O. Box 7911   
              Products Sector            Raleigh, NC 27695
      5005 E. McDowell Rd                
      MS Z201
      Phoenix, AZ 85008

   Sumit Ghosh                        Alfred Hartmann
      Lab for Eng. Man/Machine Syst.     Tamarack Storage Devices, Inc.   
      Brown University                   3500 W. Balcones Center Drive
      Box D                              Austin, TX 78759-6509 
      Div. of Engineering                
      Providence, RI 02912                

   Tim E. Harvey                      Paul Haugsjaa  
      E-Systems                          GTE Labs    
      Melpar Division                    40 Sylvan Rd    
      7700 Arlington Blvd.               Waltham, MA 02154   
      Falls Church, VA 22046                  

   Vijay Jain                         Dr. Ravi Kaw
      Dept. of Electrical Eng.           Hewlett Packard Co.
      University of South Florida        1501 Page Mill Road, Bldg. 1L
      Tampa, FL 33620                    PO Box 10490
                                         Palo Alto, CA 94303-0971

   Ashok K. Krishnamurthy             Gail Lalk
      Dept. of Electrical Eng.           Bellcore
      The Ohio State University          445 South Street
      2015 Neil Avenue                   Room 2Q-144                 
      Columbus, OH 43210                 Morristown, NJ 07962

   Ron Lasky                          Jack F. McDonald
      IBM Corp.                          Center of Integrated Electronics
      1701 N. Street                     Room 210
      Endicott, NY 13760                 Rensselaer Polytechnic Institute
                                         Troy, NY 12181

   James E. Morris                    A. Rucinski
      Dept. of Electrical Eng.           Dept. of Electrical and Computer Eng   
      Watson School of Eng.              Kingsbury Hall 
      SUNY-Binghamton                    U. New Hampshire
      PO Box 6000                        Durham, NH 03824
      Binghamton, NY 13901               

   Udy Shrivastava                    Mani Soma
      Intel Corp.                        Dept. of Electrical Engineering
      CH4-30                             University of Washington
      5000 West Chandler Blvd.           University of Washington
      Chandler, AZ 85226                 Seattle, WA 98195

   Jon Turino                         Yervant Zorian
      Logical Solutions Technol., Inc.   AT&T Bell Laboratories
      96 Shereen Place                   Carter Road  
      Suite 101                          P.O. Box 900
      Campbell, CA 9500                  Princeton, NJ 08540  


****OBJECTIVES OF JOURNAL****

  Interest in the relationship between the underlying physical technologies of
  microelectronic systems and the functional behavior and performance of
  systems is growing rapidly as VLSI matures and the ULSI era is entered. 
  This increasing interest is driven not only by microelectronics evolving
  rapidly to either very high density "systems-on-a-chip" or very high speed
  "subsystems-on-a-chip" but also by the appearance of increasingly complex
  structures combining hardware and software.  This trend will become more
  entrenched as the integrated circuit technologies evolve.   The
  microelectronics specialist is increasingly forced to be a major
  participant in the definition of system architectures, even though his
  traditional focus has been on individual device structures and
  interconnections.  At the same time, the systems engineer must increasingly
  participate in applying tradeoffs at the microelectronics circuit level to
  obtain competitive system designs, even though his traditional focus has
  been on the global behavior of system architectures.  In addition, the
  relatively strict historical boundary between hardware issues and software
  issues must be routinely crossed in microelectronic systems since the
  VLSI/ULSI components combine microelectronic circuits and embedded software
  to optimize the functionality and performance of the integrated circuits.


  The Journal of Microelectronic System Integration, emphasizing
  interdisciplinary articles focussing on the system integration issues of
  microelectronic systems, will provide a forum for discussion of those
  integration issues.


****FOCUS AREAS FOR ARTICLES****

  Topics emphasized by the Journal of Microelectronic Systems Integration
  include, but are not limited to, the following three general areas.


    i)  Case studies:  Case studies of high performance, microelectronic system
        prototypes and advanced products.  The Journal will routinely highlight
        articles describing systems developed by system design teams with
        significant funding support from industrial and/or public R&D programs. 
        These articles will serve as a "real world" connection for the articles
        on specific topics.


    ii) Theories and analytic models: Mathematical principles applicable to
        design of high performance microelectronic systems will be emphasized. 
        Typical areas include the following.

        a) Mathematical models for modeling complex systems or functions within
           complex systems.

        b) Analytic models of physical performance for design and simulation of
           system elements and their interconnections.

        c) Performance models of system-level functions depending on both
           physical performance and functional response.

        d) System models suitable for physical partitioning, scalability
           evaluation, fault tolerance, etc.


  iii) Technology foundations for microelectronic systems:  System-oriented
       technologies enabling higher levels of performance, new architectures,
       etc. are a major emphasis area.  Representative topics include

       a) Emerging technologies (such as programmable VLSI logic, MCMs, WSI,
          optical interconnections, etc.) for system level packaging, component
          interconnection, thermal management, etc.

       b) Software technologies and software/hardware co-design for integrated
          systems.

       c) Design for manufacturability, particularly for emerging technologies.

       d) Strategies for system-level testing, repair, fault tolerance, etc.

       e) High performance communications environments for microelectronic
          systems.

       f) Computer-aided system engineering.

****SUBSCRIPTION INFORMATION****

    The personal subscription rate for the Journal of Microelectronic
    Systems Integration is $50.00/year in the United States and $60.00/year
    elsewhere.  A free sample copy can be obtained from the publisher at
    the address below.

        Plenum Publishing Corp.
        Attn: Dept JK-93
        233 Spring Street
        New York, NY 10013-1578
	Tel:  (212)807-1047

   In the United Kingdom, 
        Plenum Publishing Corp.
        88/90 Middlesex Street
        London E1 7EZ
        United Kingdom


*****************************************************************************
**************************  IEEE CPMT ENEWS  ********************************
**************************     SECTION 4     ********************************
**************                                                  *************
**********          Recent Articles in Trade Journals           *************
**********                                                      *************
*****************************************************************************
*****************************************************************************

A)  Title:  CPLD Module Packs 50K Usable Gates, 360 Pins.
    Author:  Dave Bursky (EDN)
    Summary:  "A 50K gate module, which combines SRAM-based CPLDs,
              MCM technology, and a programmable interconnection
              chip, eases ASIC emulations."  Describes Altera's 
              EPF8050M module, which uses Altera's Flex 8000
              family and an Aptix FPIC (field programmable
              interconnection chip).
    Published in:  END, April 4, 1994 (Cover Story): pp 45-48
    Contact:  Altera Corp., (408)894-7000.

B)  Title:  Pick the Right Package for Your Next ASIC Design
    Author:  David P. Piven, ASIC  Div., Motorola Semiconductor
             Products Sector
    Summary:  "The quest for higher integration levels in ASICs and
              competitive pressures to reduce system manufacturing 
              costs has driven IC methods.  This article should help
              you evaluate the many choices available to find the
              best match of design performance and system costs.
    Published in:  END, Feb. 3, 1994 (Design Features): pp 91-108.

C)  Special Report:  "CAD tools for MCMs", Computer Design, March 1994

    1) Title:   "A Successful MCM Design Isn't a Matter of Luck" 
       Author:  Computer Design staff
       Summary:  Overview of EDA situation.
       Published in:  Computer Design, March, 1994.

    2) Title:   "Designing a Four-Processor DSP MCM with 3-D Memory" 
       Author:  Stan Drobac (nCHIP) and Mike Brock (TI)
       Summary:  Describes program for system combining DSPs and
                 3-D memory cubes in a high performance MCM module.
       Published in:  Computer Design, March, 1994.

    3) Title:   "A Case STudy of MCMs: Three Successful Designs" 
       Author:  Tony Mazzulo (Harris EDA)
       Summary:  Describes three examples of MCM designs, including
                 a Sparc on a module.
       Published in:  Computer Design, March, 1994.

D)  Title:  Chip-and-Wire Assembly for MCMs
    Author:  N. Braithwaite and C. Hodges (nCHIP)
    Summary:  Article focuses "on the front-end processes (substrate
              attach, die attach, and wire bond) of the MCM assembly 
              operation.
    Published in:  Electronic Packaging and Production, Feb. 1994.

E)  Title:  Processing Solutions for Thin Film MCMs
    Author:  J. Cech, A. Burnett, C-P Chien, M. Tanielian (Boeing)
    Summary:  Article focusses on approaches to high wiring density,
              compact vias, fully passivated copper lines, etc. for 
              MCM-Ds.
    Published in:  Electronic Packaging and Production, Feb. 1994.


F)  Title:  MCM-L Approach Provides Cost-Effective Multichip Modules
    Author:  B. Besser, L. Bell, and D. Robinson (Motorola)
    Summary:  "In the fledging world of MCMs, cost continues to be
              the overriding concern for potential users.  The major
              application opportunities are in consumer products, where
              cost and size are primary considerations.  Laminate MCMs, 
              in particular, address these needs.  Specific advantages
              of MCM-L include low cost, high volume substrate manu-
              facturing, and extensive leveraging of existing IC
              assembly technologies.
    Published in:  Solid State Technology, Apr. 1994.



*****************************************************************************
**************************  IEEE CPMT ENEWS  ********************************
**************************     SECTION 5     ********************************
*************                                                  **************
*********   ANNOUNCEMENT:  University Relations Committee           *********
*********                  EIA MCM Division                         *********
*********                                                      **************
*****************************************************************************
*****************************************************************************

The University Relations Committee of the Electronics Industries
Association (EIA) MCM Division has been preparing a directory of
academic institutions engaged in multichip module (MCM) packaging
research and related topics.  The directory will be a useful data
base for anyone working in the MCM area to improve communications
and networking.

To obtain information on being listed in this directory, contact:
   Dr. Earl Claire
   EIA MCM Division
   University Relations Committee
   Center for Microelectronics Research
   4202 EEast Fowler Ave.
   Tampa, FL 33620-5350
   Tel: (813)974-2096
   Fax: (813)974-3610


*****************************************************************************
**************************  IEEE CPMT ENEWS  ********************************
**************************     SECTION 6     ********************************
*************                                                  **************
*********         SUBSCRIPTION REQUESTS & SUBMISSION INFO      **************
*********                                                      **************
*****************************************************************************
*****************************************************************************
     
To subscribe to the PKG_NEWS and/or MCM_INFO components, send an e-mail
message to "pkg_news@msrc.wvu.edu".  The body of the message should
include the following:
    i)  Full name
   ii)  Full mailing address
  iii)  Telephone number
   iv)  Fax number
    v)  E-Mail address
  
   vi)  THE OPTION YOU WISH FOR AUTOMATIC RECEIPT OF PKG_NEWS.
        a) "OPTION TOC"  (for table of contents only)
        b) "OPTION TOC+SUM" (for table of contents and summary)
        c) "OPTION FULL"  (for full copy of newsletter)

   vii) THE OPTION TO RECEIVE MCM_INFO, i.e., "OPTION MCM_INFO"

  
***SUBMISSION OF MATERIAL FOR PKG_NEWS AND FOR MCM_INFO***

   Send information to be included in the PKG_NEWS by e-mail to
   "pkg_news@msrc.wvu.edu".  Send information to be included in
   MCM_INFO by e-mail to "mcm_news@msrc.wvu.edu". Receipt of
   information will be acknowledged.

   Information submitted should be in a format readable as
   electronic mail by subscribers.  The manager of the newsletter
   will not reformat submitted information but will advise sender
   of any problems.


                     ***END OF NEWSLETTER***